SEPTEMBER 2013

DSC-3622/10

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©2013 Integrated Device Technology, Inc.

Features

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512K x 8 advanced high-speed CMOS Static RAM

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JEDEC Center Power / GND pinout for reduced noise

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Equal access and cycle times

— Commercial and Industrial: 10/12/15ns

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Single 3.3V power supply

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One Chip Select plus one Output Enable pin

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Bidirectional data inputs and outputs directly

TTL-compatible

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Low power consumption via chip deselect

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Available in 36-pin, 400 mil plastic SOJ package and

44-pin, 400 mil TSOP.

Functional Block Diagram

Description

TheIDT71V424isa4,194,304-bithigh-speedStaticRAMorganized

as512Kx8.Itisfabricatedusinghigh-perfomance,high-reliabilityCMOS

technology.Thisstate-of-the-arttechnology,combinedwithinnovative

circuitdesigntechniques,providesacost-effectivesolutionforhigh-speed

memoryneeds.

The IDT71V424 has an output enable pin which operates as fast as

5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand

outputs of the IDT71V424 are TTL-compatible and operation is from a

single3.3Vsupply.Fullystaticasynchronouscircuitryisused,requiring

no clocks or refresh for operation.

TheIDT71V424ispackagedina36-pin,400milPlasticSOJand44-

pin, 400 mil TSOP.

ADDRESS

DECODER

4,194,304-BIT

MEMORY ARRAY

I/O CONTROL

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8

8

8

CONTROL

LOGIC

WE

OE

CS

3622 drw 01

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3.3V CMOS Static RAM

4 Meg (512K x 8-Bit)

IDT71V424S

IDT71V424L