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71V424L10YG8 Datasheet(PDF) 1 Page - Integrated Device Technology |
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71V424L10YG8 Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 9 page SEPTEMBER 2013 DSC-3622/10 1 ©2013 Integrated Device Technology, Inc. Features ◆ ◆ ◆ ◆ ◆ 512K x 8 advanced high-speed CMOS Static RAM ◆ ◆ ◆ ◆ ◆ JEDEC Center Power / GND pinout for reduced noise ◆ ◆ ◆ ◆ ◆ Equal access and cycle times — Commercial and Industrial: 10/12/15ns ◆ ◆ ◆ ◆ ◆ Single 3.3V power supply ◆ ◆ ◆ ◆ ◆ One Chip Select plus one Output Enable pin ◆ ◆ ◆ ◆ ◆ Bidirectional data inputs and outputs directly TTL-compatible ◆ ◆ ◆ ◆ ◆ Low power consumption via chip deselect ◆ ◆ ◆ ◆ ◆ Available in 36-pin, 400 mil plastic SOJ package and 44-pin, 400 mil TSOP. Functional Block Diagram Description TheIDT71V424isa4,194,304-bithigh-speedStaticRAMorganized as512Kx8.Itisfabricatedusinghigh-perfomance,high-reliabilityCMOS technology.Thisstate-of-the-arttechnology,combinedwithinnovative circuitdesigntechniques,providesacost-effectivesolutionforhigh-speed memoryneeds. The IDT71V424 has an output enable pin which operates as fast as 5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand outputs of the IDT71V424 are TTL-compatible and operation is from a single3.3Vsupply.Fullystaticasynchronouscircuitryisused,requiring no clocks or refresh for operation. TheIDT71V424ispackagedina36-pin,400milPlasticSOJand44- pin, 400 mil TSOP. ADDRESS DECODER 4,194,304-BIT MEMORY ARRAY I/O CONTROL • • • A0 A18 8 8 I/O0 -I/O7 8 CONTROL LOGIC WE OE CS 3622 drw 01 • • • 3.3V CMOS Static RAM 4 Meg (512K x 8-Bit) IDT71V424S IDT71V424L |
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