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SI4362 Datasheet(PDF) 9 Page - Silicon Laboratories

Part # SI4362
Description  Garage and gate openers
Download  46 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI4362 Datasheet(HTML) 9 Page - Silicon Laboratories

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Si4362
Rev 0.4
9
Table 6. Digital IO Specifications (GPIO_x, SCLK, SDO, SDI, nSEL, nIRQ, SDN)1
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Rise Time2,3
TRISE
0.1 x VDD to 0.9 x VDD,
CL =10pF,
DRV<1:0> = HH
—2.3
ns
Fall Time3,4
TFALL
0.9 x VDD to 0.1 x VDD,
CL =10pF,
DRV<1:0> = HH
—2
ns
Input Capacitance
CIN
—2
pF
Logic High Level Input Voltage
VIH
VDD x0.7
V
Logic Low Level Input Voltage
VIL
——
VDD x0.3
V
Input Current
IIN
0<VIN< VDD
–10
10
µA
Input Current If Pullup is Activated
IINP
VIL =0V
1
10
µA
Drive Strength for Output Low
Level
IOmaxLL
DRV[1:0] = LL3
—6.66
mA
IOmaxLH
DRV[1:0] = LH3
—5.03
mA
IOmaxHL
DRV[1:0] = HL3
—3.16
mA
IOmaxHH
DRV[1:0] = HH3
—1.13
mA
Drive Strength for Output High
Level
IOmaxLL
DRV[1:0] = LL3
—5.75
mA
IOmaxLH
DRV[1:0] = LH3
—4.37
mA
IOmaxHL
DRV[1:0] = HL3
—2.73
mA
IOmaxHH
DRV[1:0] = HH3
—0.96
mA
Drive Strength for Output High
Level for GPIO0
IOmaxLL
DRV[1:0] = LL3
—2.53
mA
IOmaxLH
DRV[1:0] = LH3
—2.21
mA
IOmaxHL
DRV[1:0] = HL3
—1.7
mA
IOmaxHH
DRV[1:0] = HH3
—0.80
mA
Logic High Level Output Voltage
VOH
DRV[1:0] = HL
VDD x0.8
V
Logic Low Level Output Voltage
VOL
DRV[1:0] = HL
VDD x0.2
V
Notes:
1. All specifications guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test
Conditions" section in "1.1. Definition of Test Conditions" on page 11.
2. 8 ns is typical for GPIO0 rise time.
3. Assuming VDD = 3.3 V, drive strength is specified at Voh (min) = 2.64 V and Vol(max) = 0.66 V at room temperature.
4. 2.4 ns is typical for GPIO0 fall time.


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