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Si7034-A10-IMR Datasheet(PDF) 5 Page - Silicon Laboratories |
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Si7034-A10-IMR Datasheet(HTML) 5 Page - Silicon Laboratories |
5 / 29 page Si7034-A10 Rev. 1.0 5 Conversion Time tCONV Normal Mode, RH conversion1 5.8 8.5 ms Normal Mode, Temperature conversion1 3.7 6 ms Fast Mode, parallel Temp and RH conver- sion2 0.9 1.5 ms Fast Mode, additional RH conversion time4 1.6 2.5 ms Powerup Time tPU From VDD ≥ 1.67 V to ready for a conversion, 25 °C — 10 15 ms From VDD ≥ 1.67 V to ready for a conversion, full temperature range — — 50 ms After issuing a software reset command —1.2 2.0 ms Table 3. I2C Interface Specifications1 1.67 V DD 1.98 V; TA = –40 to +125 °C unless otherwise noted. Parameter Symbol Test Condition Min Typ Max Unit Hysteresis VHYS High-to-low versus low-to-high transition 0.05 x VDD —— V SCLK Frequency2 fSCL — — 400 kHz SCL High Time tSKH 0.6 — — µs SCL Low Time tSKL 1.3 — — µs Start Hold Time tSTH 0.6 — — µs Notes: 1. All values are referenced to VIL and/or VIH. 2. Depending on the conversion command, the Si7034 may hold the master during the conversion (clock stretch). At above 300 kHz SCL, the Si7034 may hold the master briefly for user register and device ID transactions. At the highest I2C speed of 400 kHz the stretching will be <50 µs. 3. Pulses up to and including 50 ns will be suppressed. Table 2. General Specifications (Continued) 1.67 V DD 1.98 V; TA = –40 to +125 °C unless otherwise noted. Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. In Normal Mode, a temperature conversion is performed first, followed by an RH conversion. 2. In Fast Mode, both a temperature conversion and an RH conversion are initiated at the same time and occur in parallel. 3. Current consumption of RH conversion after the temperature conversion has finished. In Fast Mode, the temperature conversion finishes before the RH conversion. 4. Additional time for RH conversion after the temperature conversion has finished. 5. No conversion or I2C transaction in progress. Typical values measured at 25 °C. 6. Occurs once during powerup. Duration is <5 msec. 7. Occurs during I2C commands for Reset, Read/Write User Registers, Read EID, and Read Firmware Version. Duration is <100 μs when I2C clock speed is >100 kHz (>200 kHz for 2-byte commands). 8. IDD after a user register write. Initiating any other subsequent I2C transaction on the same bus (such as a user register read, starting an RH measurement, or traffic directed at other I2C devices) will transition the device to standby mode. 9. Additional current consumption when HTRE bit enabled. |
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