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STK15C68-S35I Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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STK15C68-S35I Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 9 page  4-61 STK15C68 8K x 8 AutoStore™ nvSRAM High Performance CMOS Nonvolatile Static RAM FEATURES • Nonvolatile Storage Without Battery Problems • Directly Replaces 8K x 8 static RAM, Battery Backed RAM or EEPROM • 25ns, 35ns and 45ns Access Times • Store to EEPROM Initiated by Software or AutoStore™ on Power Down • Recall to SRAM by Software or Power Restore • 15mA I CC at 200ns Cycle Time • Unlimited Read, Write and Recall Cycles • 1,000,000 Store Cycles to EEPROM • 100 Year Data Retention Over Full Industrial Temperature Range • Commercial and Industrial Temp. Ranges • 28 Pin 600 or 300 mil PDIP and 350 mil SOIC DESCRIPTION The STK15C68 is a fast SRAM with a nonvolatile EEPROM element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent, nonvolatile data resides in EEPROM. Data transfers from the SRAM to EEPROM (the STORE operation) can take place auto- matically on power down using charge stored in system capacitance. Transfers from the EEPROM to the SRAM (the RECALL operation) take place automatically on res- toration of power. Initiation of STORE and RECALL cycles can also be controlled by entering control sequences on the SRAM inputs. The nvSRAM can be used in place of existing 8K x 8 SRAMs and also matches the pinout of 8k x 8 Battery Backed SRAMs, EPROMs, and EEPROMs, allowing direct substitution while enhanc- ing performance. There is no limit on the number of read or write cycles that can be executed and no support cir- cuitry is required for microprocessor interface. BLOCK DIAGRAM A 0 A 12 VCC POWER CONTROL A A A A A A 5 6 7 8 9 11 12 A DQ 128 x 512 128 x 512 10 0 AA 2 A 1 A A A 4 3 4 EEPROM ARRAY DQ DQ DQ 5 RECALL CONTROL ARRAY 0 COLUMN DEC STORE DQ COLUMN I/O DQ 6 DETECT STORE/ 1 7 2 SOFTWARE DQ STATIC RAM 3 RECALL DQ W E G PIN NAMES A0 - A12 Address Inputs W Write Enable DQ0 - DQ7 Data In/Out E Chip Enable G Output Enable VCC Power (+5V) VSS Ground 28 - 300 PDIP 28 - 600 PDIP 28 - 350 SOIC NC NC 10 G A 1 22 5 25 3 E 12 6 27 V A 23 5 6 A A 7 16 3 11 0 A 9 6 1 11 19 A 8 17 0 7 A 821 26 7 14 SS 3 28 DQ 9 4 CC DQ A DQ 5 A 1 A W A DQ 10 2 DQ 2 20 18 DQ 12 24 DQ 4 15 DQ A V A 2 13 4 PIN CONFIGURATIONS |
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