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TDA8741 Datasheet(PDF) 7 Page - NXP Semiconductors

Part # TDA8741
Description  Satellite sound circuit with noise reduction
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8741 Datasheet(HTML) 7 Page - NXP Semiconductors

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October 1994
7
Philips Semiconductors
Product specification
Satellite sound circuit with noise reduction
TDA8741; TDA8741H
FUNCTIONAL DESCRIPTION
Satellite sound
The baseband signal coming from a satellite tuner
contains the demodulated video signal plus a number of
sound carriers to facilitate reception of a
PAL/NTSC/SECAM satellite signal.
Nearest to the video signal is the main sound carrier which
carries the single channel sound related to the video. This
is an FM modulated carrier with a fixed pre-emphasis. The
carrier frequency can be in the range of 5.8 to 6.8 MHz.
Additionally, a number of optional secondary sound
carriers may be present which can be used for stereo or
multi-language sound related to the video, or for unrelated
radio sound. These carriers are also FM modulated, but for
better sound quality (improved signal-to-noise
performance) broadcast satellites (e.g. ‘ASTRA’) use a
noise reduction system (adaptive pre-emphasis circuit,
combined with a fixed pre-emphasis).
These secondary carrier frequencies can be in the range
of 6.30 to 8.28 MHz. For accurate tuning to the many
sound carriers an external frequency synthesizer and
mixer is used to transpose the sound carriers to
intermediate frequencies of 10.7 and 10.52 MHz.
The TDA8741; H contains all circuitry for processing the
main channel and for two secondary channels, from IF
signal to line (SCART) output drivers. The desired
frequencies can be routed to the TDA8741; H via
bandpass filters.
Main channel (see Fig.1)
The lock-in range of the main channel PLL can be
switched between 5.5 to 7.5 MHz, PLL off and 10.0 to
11.5 MHz using the MCS signal at pin 7 (2) [when pin 7 (2)
is at logic 0, being a voltage from 0 to 1.2 V, the lock-in
range = 5.5 to 7.5 MHz; when pin 7 (2) is at logic 1, being
a voltage from 3.5 V until VP, the lock-in range = 10.0 to
11.5 MHz; when pin 7 (2) is in the mid voltage position,
being a voltage from 1.8 to 2.8 V, the main channel PLL is
switched off]. The voltage is then determined by the
resistor divider at this pin between VP and ground.
If only one fixed carrier frequency for the main channel is
to be demodulated (e.g. 6.5 MHz), the lock-in range of the
PLL should be switched to 5.5 to 7.5 MHz. The baseband
signal is applied to the main channel input, pin 18 (14) via
a 6.5 MHz ceramic bandpass filter. Alternatively, if there is
a requirement to demodulate different main channel
frequencies, these frequencies can be transferred to a
fixed intermediate frequency (e.g. 10.7 MHz) using an
external mixer and oscillator-frequency synthesizer. In this
event the lock-in range of the PLL should be switched to
10.0 to 11.5 MHz. The IF signal is applied to the main
channel input, pin 18 (14) via a 10.7 MHz ceramic
bandpass filter.
The filtered signal is AC-coupled to a limiter/amplifier and
then to a PLL demodulator. The PLL FM demodulator
ensures that the demodulator is alignment-free. High gain
and DC error signals from the PLL, which are
superimposed on the demodulator output, require DC
decoupling. A buffer amplifier is used to amplify the signal
to the same level as the secondary channels and
decouples DC using an electrolytic capacitor connected to
pin 41 (37). The demodulator output signal is fed to pin 20
(16) via an internal resistor. The output signal can be
de-emphasized by means of this resistor and an external
capacitor connected to ground.
Capacitor value = de-emphasis time constant per 1500
(for 50
µs: 33 nF).
From here the signal is fed to the output selectors. The
signal is amplified to 500 mV (RMS) (i.e.
−6 dBV) in the
output amplifiers.
Secondary channels
An external mixer and oscillator frequency synthesizer
transfers the secondary sound carriers to fixed
intermediate frequencies e.g. 10.7 and 10.52 MHz. Two
secondary channel inputs are available at pins 8 and 16 (3
and 11). The signals are routed to the inputs via external
ceramic bandpass filters which are tuned to the required
intermediate frequencies.
For stereo applications the TDA8741; TDA8741H contains
two identical secondary sound processing channels.
Secondary Channel 1 will also be referred to as ‘LEFT’ or
‘LANGUAGE 1’ and secondary Channel 2 will also be
referred to as ‘RIGHT’ or ‘LANGUAGE 2’.
From the inputs the signals are coupled to
limiter/amplifiers and then to the PLL demodulators.
Processing is similar to the main channel. The
demodulator output signal is amplified in a buffer amplifier
and DC decoupled using electrolytic capacitors connected
to pins 40 (36) (left) and 42 (38) (right). The output level is
set with a resistor connected in series with the capacitor.
High frequency components in the amplified PLL output
signal are filtered out in the audio LPF block (4th order
Butterworth low-pass filter) to prevent unwanted influence
on the noise reduction.


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