ADF4355 datasheet(9/36 Pages) AD

Part #	ADF4355

Description	Analog and digital lock detect

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9 / 36 page

ADF4355

Data Sheet

Rev. A | Page 8 of 35

Pin No.

Mnemonic

Description

25, 32

CREG1, CREG2

Outputs from the LDO Regulator. CREG1 and CREG2 are the supply voltages to the digital circuits and have a

nominal voltage of 1.8 V. Decoupling capacitors of 100 nF connected to AGND are required for these pins.

26

PDBRF

RF Power-Down. A logic low on this pin mutes the RF outputs. This mute function is also software controllable.

27

DVDD

Digital Power Supply. This pin must be at the same voltage as AVDD. Place decoupling capacitors to the ground

plane as close to this pin as possible.

28

REFINB

Complementary Reference Input. If unused, ac-couple this pin to AGND.

29

REFINA

Reference Input.

30

MUXOUT

Multiplexer Output. The multiplexer output allows the digital lock detect, the analog lock detect, scaled RF, or the

scaled reference frequency to be externally accessible.

31

SDGND

Digital Σ-Δ Modulator Ground. SDGND is the ground return path for the Σ-Δ modulator.

EP

Exposed Pad. The exposed pad must be connected to AGND.

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