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ADP5052 Datasheet(PDF) 11 Page - Analog Devices |
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ADP5052 Datasheet(HTML) 11 Page - Analog Devices |
11 / 37 page ADP5053 Data Sheet Rev. B | Page 10 of 36 Pin No. Mnemonic Description 32 BST1 High-Side FET Driver Power Supply for Channel 1. 33, 34 SW1 Switching Node Output for Channel 1. 35, 36 PVIN1 Power Input for the Internal 5.1 V VREG Linear Regulator and the Channel 1 Buck Regulator. Connect a bypass capacitor between this pin and ground. 37 EN1 Enable Input for Channel 1. An external resistor divider can be used to set the turn-on threshold. 38 SS12 Connect a resistor divider from this pin to VREG and ground to configure the soft start time for Channel 1 and Channel 2 (see the Soft Start section).This pin is also used to configure parallel operation of Channel 1 and Channel 2 (see the Parallel Operation section). 39 COMP1 Error Amplifier Output for Channel 1. Connect an RC network from this pin to ground. 40 FB1 Feedback Sensing Input for Channel 1. 41 RT Frequency Setting. Connect a resistor from RT to ground to program the switching frequency from 250 kHz to 1.4 MHz. For more information, see the Oscillator section. 42 VDD Output of the Internal 3.3 V Linear Regulator. Connect a 1 µF ceramic capacitor between this pin and ground. 43 SYNC/MODE Synchronization Input/Output (SYNC). To synchronize the switching frequency of the device to an external clock, connect this pin to an external clock with a frequency from 250 kHz to 1.4 MHz. The SYNC function of this pin can also be configured as a synchronization output by factory fuse. Forced PWM or Automatic PWM/PSM Selection Pin (MODE). When this pin is logic high, the device operates in forced PWM (FPWM) mode. When this pin is logic low, the device operates in automatic PWM/PSM mode. 44 VREG Output of the Internal 5.1 V Linear Regulator. Connect a 1 µF ceramic capacitor between this pin and ground. 45 FB3 Feedback Sensing Input for Channel 3. 46 COMP3 Error Amplifier Output for Channel 3. Connect an RC network from this pin to ground. 47 SS34 Connect a resistor divider from this pin to VREG and ground to configure the soft start time for Channel 3 and Channel 4 (see the Soft Start section). 48 EN3 Enable Input for Channel 3. Use an external resistor divider to set the turn-on threshold. 0 EPAD Exposed Pad (Analog Ground). The exposed pad must be connected and soldered to an external ground plane. |
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