Electronic Components Datasheet Search |
|
X3100 Datasheet(PDF) 11 Page - Xicor Inc. |
|
X3100 Datasheet(HTML) 11 Page - Xicor Inc. |
11 / 40 page X3100/X3101 – Preliminary Information Characteristics subject to change without notice. 11 of 40 REV 1.1.8 12/10/02 www.xicor.com Current Sense Gain (CSG1, CSG0) These bits set the gain of the current sense amplifier. These are x10, x25, x80 and x160. For more detail, see section “Current Monitor Function” on page 20. Table 14. Current Sense Gain Control Charge/Discharge Control (OVPC, UVPC) The OVPC and UVPC bits allow control of cell charge and discharge externally, via the SPI port. These bits control the OVP/LMON and UVP/OCP pins, which in turn control the external power FETs. Using P-channel power FETs ensures that the FET is on when the pin voltage is low (Vss), and off when the pin voltage is high (Vcc). OVP/LMON and UVP/OCP can be controlled by using the WCNTR Instruction to set bits OVPC and UVPC in the Control register (See page 10). Table 15. UVP/OVP Control It is possible to set/change the values of OVPC and UVPC during a protection mode. A change in the state of the pins OVP/LMON and UVP/OCP, however, will not take place until the device has returned from the protection mode. Cell Voltage Balance Control (CBC1-CBC4) This function can be used to adjust individual battery cell voltage during charging. Pins CB1–CB4 are used to control external power switching devices. Cell voltage balancing is achieved via the SPI port. Table 16. CB1—CB4 Control CB1–CB4 can be controlled by using the WCNTR In- struction to set bits CBC1–CBC4 in the control register (Table 16). STATUS REGISTER The status of the X3100 or X3101 can be verified by using the RDSTAT command to read the contents of the Status Register (Table 17). Table 17. Status Register. The function of each bit in the status register is shown in Table 18. Bit 0 of the status register (VRGS+OCDS) actually indicates the status of two conditions of the X3100 or X3101. Voltage Regulator Status (VRGS) is an internally generated signal which indicates that the output of the Voltage Regulator (VRGO) has reached an output of 5VDC ± 0.5%. In this case, the voltage regulator is said to be “tuned”. Before the signal VRGS goes low (i.e. before the voltage regulator is tuned), the voltage at the output of the regulator is nominally 5VDC ± 10% (See section “Voltage Regulator” on page 21.) Over-current Detection Status (OCDS) is another internally generated signal which indicates whether or not the X3100 or X3101 is in over-current protection mode. Signals VRGS and OCDS are logically OR’ed together (VRGS+OCDS) and written to bit 0 of the status register (See Table 18, Table 17 and Figure 2). Control Register Bits Operation CSG1 CSG0 0 0 Set current sense gain=x10 0 1 Set current sense gain=x25 1 0 Set current sense gain=x80 1 1 Set current sense gain=x160 Control Register Bits Operation OVPC UVPC 1 x Pin OVP=VSS (FET ON) 0 x Pin OVP=VCC (FET OFF) x 1 Pin UVP=VSS (FET ON) x 0 Pin UVP=VCC (FET OFF) Control Register Bits Operation CBC4 CBC3 CBC2 CBC1 x x x 1 Set CB1=VCC (ON) x x x 0 Set CB1=VSS (OFF) x x 1 x Set CB2=VCC (ON) x x 0 x Set CB2=VSS (OFF) x 1 x x Set CB3=VCC (ON) x 0 x x Set CB3=VSS (OFF) 1 x x x Set CB4=VCC (ON) 0 x x x Set CB4=VSS (OFF) 76543 2 1 0 00000 CCES+ OVDS UVDS VRGS+ OCDS |
Similar Part No. - X3100 |
|
Similar Description - X3100 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |