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C8051F54X Datasheet(PDF) 80 Page - Silicon Laboratories

Part # C8051F54X
Description  Mixed Signal ISP Flash MCU Family
Download  276 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F54X Datasheet(HTML) 80 Page - Silicon Laboratories

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C8051F54x
79
Rev. 1.1
SETB C
Set Carry
1
1
SETB bit
Set direct bit
2
2
CPL C
Complement Carry
1
1
CPL bit
Complement direct bit
2
2
ANL C, bit
AND direct bit to Carry
2
2
ANL C, /bit
AND complement of direct bit to Carry
2
2
ORL C, bit
OR direct bit to carry
2
2
ORL C, /bit
OR complement of direct bit to Carry
2
2
MOV C, bit
Move direct bit to Carry
2
2
MOV bit, C
Move Carry to direct bit
2
2
JC rel
Jump if Carry is set
2
2/3*
JNC rel
Jump if Carry is not set
2
2/3*
JB bit, rel
Jump if direct bit is set
3
3/4*
JNB bit, rel
Jump if direct bit is not set
3
3/4*
JBC bit, rel
Jump if direct bit is set and clear bit
3
3/4*
Program Branching
ACALL addr11
Absolute subroutine call
2
3*
LCALL addr16
Long subroutine call
3
4*
RET
Return from subroutine
1
5*
RETI
Return from interrupt
1
5*
AJMP addr11
Absolute jump
2
3*
LJMP addr16
Long jump
3
4*
SJMP rel
Short jump (relative address)
2
3*
JMP @A+DPTR
Jump indirect relative to DPTR
1
3*
JZ rel
Jump if A equals zero
2
2/3*
JNZ rel
Jump if A does not equal zero
2
2/3
CJNE A, direct, rel
Compare direct byte to A and jump if not equal
3
4/5*
CJNE A, #data, rel
Compare immediate to A and jump if not equal
3
3/4*
CJNE Rn, #data, rel
Compare immediate to Register and jump if not
equal
3
3/4*
CJNE @Ri, #data, rel
Compare immediate to indirect and jump if not
equal
3
4/5*
DJNZ Rn, rel
Decrement Register and jump if not zero
2
2/3*
DJNZ direct, rel
Decrement direct byte and jump if not zero
3
3/4*
NOP
No operation
1
1
Table 10.1. CIP-51 Instruction Set Summary (Continued)
Mnemonic
Description
Bytes
Clock
Cycles
Note:
Certain instructions take a variable number of clock cycles to execute depending on instruction alignment and
the FLRT setting (SFR Definition 14.3).


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