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C8051F54X Datasheet(PDF) 11 Page - Silicon Laboratories

Part # C8051F54X
Description  Mixed Signal ISP Flash MCU Family
Download  276 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F54X Datasheet(HTML) 11 Page - Silicon Laboratories

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C8051F54x
11
Rev. 1.1
SFR Definition 16.1. VDM0CN: VDD Monitor Control ................................................ 132
SFR Definition 16.2. RSTSRC: Reset Source ............................................................ 134
SFR Definition 17.1. CLKSEL: Clock Select ............................................................... 136
SFR Definition 17.2. OSCICN: Internal Oscillator Control .......................................... 138
SFR Definition 17.3. OSCICRS: Internal Oscillator Coarse Calibration ...................... 139
SFR Definition 17.4. OSCIFIN: Internal Oscillator Fine Calibration ............................ 139
SFR Definition 17.5. CLKMUL: Clock Multiplier .......................................................... 141
SFR Definition 17.6. OSCXCN: External Oscillator Control ........................................ 143
SFR Definition 18.1. XBR0: Port I/O Crossbar Register 0 .......................................... 154
SFR Definition 18.2. XBR1: Port I/O Crossbar Register 1 .......................................... 155
SFR Definition 18.3. XBR2: Port I/O Crossbar Register 1 .......................................... 156
SFR Definition 18.4. P0MASK: Port 0 Mask Register ................................................. 157
SFR Definition 18.5. P0MAT: Port 0 Match Register .................................................. 157
SFR Definition 18.6. P1MASK: Port 1 Mask Register ................................................. 158
SFR Definition 18.7. P1MAT: Port 1 Match Register .................................................. 158
SFR Definition 18.8. P2MASK: Port 2 Mask Register ................................................. 159
SFR Definition 18.9. P2MAT: Port 2 Match Register .................................................. 159
SFR Definition 18.10. P3MASK: Port 3 Mask Register ............................................... 160
SFR Definition 18.11. P3MAT: Port 3 Match Register ................................................ 160
SFR Definition 18.12. P0: Port 0 ................................................................................. 161
SFR Definition 18.13. P0MDIN: Port 0 Input Mode ..................................................... 162
SFR Definition 18.14. P0MDOUT: Port 0 Output Mode .............................................. 162
SFR Definition 18.15. P0SKIP: Port 0 Skip ................................................................. 163
SFR Definition 18.16. P1: Port 1 ................................................................................. 163
SFR Definition 18.17. P1MDIN: Port 1 Input Mode ..................................................... 164
SFR Definition 18.18. P1MDOUT: Port 1 Output Mode .............................................. 164
SFR Definition 18.19. P1SKIP: Port 1 Skip ................................................................. 165
SFR Definition 18.20. P2: Port 2 ................................................................................. 165
SFR Definition 18.21. P2MDIN: Port 2 Input Mode ..................................................... 166
SFR Definition 18.22. P2MDOUT: Port 2 Output Mode .............................................. 166
SFR Definition 18.23. P2SKIP: Port 2 Skip ................................................................. 167
SFR Definition 18.24. P3: Port 3 ................................................................................. 167
SFR Definition 18.25. P3MDIN: Port 3 Input Mode ..................................................... 168
SFR Definition 18.26. P3MDOUT: Port 3 Output Mode .............................................. 168
SFR Definition 18.27. P3SKIP: Port 3Skip .................................................................. 169
SFR Definition 19.1. LIN0ADR: LIN0 Indirect Address Register ................................. 177
SFR Definition 19.2. LIN0DAT: LIN0 Indirect Data Register ....................................... 177
SFR Definition 19.3. LIN0CF: LIN0 Control Mode Register ........................................ 178
SFR Definition 20.1. SMB0CF: SMBus Clock/Configuration ...................................... 193
SFR Definition 20.2. SMB0CN: SMBus Control .......................................................... 195
SFR Definition 20.3. SMB0DAT: SMBus Data ............................................................ 197
SFR Definition 21.1. SCON0: Serial Port 0 Control .................................................... 210
SFR Definition 21.2. SMOD0: Serial Port 0 Control .................................................... 211
SFR Definition 21.3. SBUF0: Serial (UART0) Port Data Buffer .................................. 212
SFR Definition 21.4. SBCON0: UART0 Baud Rate Generator Control ...................... 212


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