Figure 3. Typical gate drive circuits with Desat current sensing using ACPL-32JT

Note. Component value subject to change with varying application requirements

Operation of Integrated Flyback Controller

The primary control block implements direct duty cycle

control logics for line and load regulation. Primary winding

currents are sensed and limited to prevent transformer

short circuit failure from damaging the primary switch.

detected and the primary switch is turned off to protect

secondary overvoltage failure. The maximum PWM duty

cycle is designed to be around 55% to ensure discontinu-

ous operation mode under a high load condition. For a

complete isolated DC-DC converter, connect a discrete

transformer to ACPL-32JT, as in Figure 3. Keep the LED

5 ms) is preferred for a soft start function to control the

inrush current.

The average PWM switching frequency of the primary

switch (SW) is dithered typically in a range of

±6%. This

frequency dithering feature helps to achieve better

EMI performance by spreading the switching and its

harmonics over a wider band.

Reference DC/DC circuit

Figure 3 shows a reference circuit for DC/DC flyback con-

version including the compensation network at pin 4,

COMP.

This compensation network is referenced to a nominal

load will be up to 40 mA.

Users must further characterize the DC/DC flyback con-

version across their target operating conditions and

chosen components to ensure that the required load can

be supported.

Vin = 8V - 18V,

10uF

Lp

Ls

220nF

2kΩ

uC

+ 5V

LED2+

SSD/CLAMP

SW

AN

CA

/FAULT

/UVLO

DESAT

COMP

470kΩ

10kΩ

10kΩ

10Ω

330pF

22nF

330pF

330pF

1uF

130Ω

1kΩ

220pF

ACPL-32JT

1kΩ

130Ω

VGATE

IF

10uF

C

G

E

10uF

10uF

1uF

5