Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.NET

X  

Preview PDF Download HTML

TLC072A Datasheet(HTML) 10 Page - Texas Instruments

Click here to check the latest version.
Part No. TLC072A
Description  FAMILY OF WIDE BAND WIDTH HIGH OUTPUT DRIVE SINGLE SUPPLY OPERATIONAL AMPLIFIERS
Download  51 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo 

TLC072A Datasheet(HTML) 10 Page - Texas Instruments

Zoom Inzoom in Zoom Outzoom out
Go To Page :
/ 51 page
background image
TLC070, TLC071, TLC072, TLC073, TLC074, TLC075, TLC07xA
FAMILY OF WIDEBANDWIDTH HIGHOUTPUT DRIVE SINGLE SUPPLY
OPERATIONAL AMPLIFIERS
SLOS219D − JUNE 1999 − REVISED FEBRUARY 2004
10
WWW.TI.COM
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
operating characteristics at specified free-air temperature, VDD = 12 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA†
MIN
TYP
MAX
UNIT
SR+
Positive slew rate at unity gain
VO(PP) = 2 V,
CL = 50 pF,
25
°C
10
16
V/ s
SR+
Positive slew rate at unity gain
VO(PP) = 2 V,
RL = 10 kΩ
CL = 50 pF,
Full range
9.5
V/
µs
SR−
Negative slew rate at unity gain
VO(PP) = 2 V,
CL = 50 pF,
25
°C
12.5
19
V/ s
SR−
Negative slew rate at unity gain
VO(PP) = 2 V,
RL = 10 kΩ
CL = 50 pF,
Full range
10
V/
µs
Vn
Equivalent input noise voltage
f = 100 Hz
25
°C
12
nV/
√Hz
Vn
Equivalent input noise voltage
f = 1 kHz
25
°C
7
nV/
√Hz
In
Equivalent input noise current
f = 1 kHz
25
°C
0.6
fA /
√Hz
VO(PP) = 8 V,
AV = 1
0.002%
THD + N
Total harmonic distortion plus noise
VO(PP) = 8 V,
RL = 10 kΩ and 250 Ω,
f = 1 kHz
AV = 10
25
°C
0.005%
THD + N
Total harmonic distortion plus noise
RL = 10 kΩ and 250 Ω,
f = 1 kHz
AV = 100
25 C
0.022%
t(on)
Amplifier turnon time‡
RL = 10 kΩ
25
°C
0.47
µs
t(off)
Amplifier turnoff time‡
RL = 10 kΩ
25
°C
2.5
µs
Gain-bandwidth product
f = 10 kHz,
RL = 10 kΩ
25
°C
10
MHz
V(STEP)PP = 1 V,
AV = −1,
0.1%
0.17
ts
Settling time
AV = −1,
CL = 10 pF,
RL = 10 kΩ
0.01%
25
°C
0.22
s
ts
Settling time
V(STEP)PP = 1 V,
AV = −1,
0.1%
25
°C
0.17
µs
AV = −1,
CL = 47 pF,
RL = 10 kΩ
0.01%
0.29
φm
Phase margin
RL = 10 kΩ,
CL = 50 pF
25
°C
37
°
φm
Phase margin
RL = 10 kΩ,
CL = 0 pF
25
°C
42
°
Gain margin
RL = 10 kΩ,
CL = 50 pF
25
°C
3.1
dB
Gain margin
RL = 10 kΩ,
CL = 0 pF
25
°C
4
dB
† Full range is 0°C to 70°C for C suffix and −40°C to 125°C for I suffix. If not specified, full range is −40°C to 125°C.
‡ Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current
has reached half its final value.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51 


Datasheet Download




Link URL



Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Bookmark   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn