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GS9015ACTJ Datasheet(PDF) 10 Page - Gennum Corporation

Part # GS9015ACTJ
Description  Serial Digital Reclocker
Download  13 Pages
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Manufacturer  GENNUM [Gennum Corporation]
Direct Link  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS9015ACTJ Datasheet(HTML) 10 Page - Gennum Corporation

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10
520 - 99 - 05
Fig. 14 GS9015A Typical Test Circuit Using -5V Supply
All resistors in ohms, all capacitors in microfarads unless otherwise stated.
VCO Frequency Setting Resistors
There are two modes of VCO operation available in the
GS9015A depending on the state of the
÷2 block. The ÷2
block is enabled according to :
÷2 ENABLE = ƒ/2 • SS1. When
the ƒ/2 ENABLE (pin 10) is LOW, any of the four VCO
frequency setting resistors, RVCO0 through RVCO3, (pins
13, 14, 15 and 17) may be used for any data rate from 100
Mb/s t o 400 Mb/s. For example, for 143 Mb/s data
rate, the value of the total RVCO resistance is approximately
6k8 and for 270 Mb/s operation, the value is
approximately 3k5. The 5k potentiometers will then tune
the desired data rate near their mid-points.
Jitter performance at the lower data rates (143, 177 Mb/s) is
improved by operating the VCOat twice the normal frequency.
This is accomplished by enabling the divide by two block in
the PLL section of the GS9015A.
When ƒ/2 (Pin 10) is HIGH, two of the RVCO pins are assigned
to data rates below 200 Mb/s and two are assigned to data
rates over 200 Mb/s. The selection is dependent upon the
level of STANDARD SELECT BIT, SS1 (pin 21). When SS1
is LOW, RVCO0 and RVCO1 (pins 13 and 14) are used for the
higher data rates. When SS1 is HIGH, the VCO frequency is
now twice the bit rate and its frequency is set by RVCO2 and
RVCO3 (pins 15 and 17).
For 143 Mb/s and 270 Mb/s operation, (the VCO is at
286 MHz and 270 MHz respectively) the total resistance
required is approximately the same for both data rates. This
also applies for 177 Mb/s and 360 Mb/s operation (the VCO
is tuned to 354 MHz and 360 MHz respectively). This means
that one potentiometer may be used for each frequency pair
with only a small variation of the fixed resistor value. This
halves the number of adjustments required.
ECL
DATA
INPUTS
-5V
-5V
-5V
100
100
100
100
390
390
390
390
0.1
µ
25
24
23
22
21
20
19
5
6
7
8
9
10
11
4
3
2
1 28 27 26
12 13 14 15 16 17 18
910
5.6p
10n
-5V
÷1
÷2
0.1
µ
10k
DATA
CARRIER
DETECT
OUTPUT
DATA
CLOCK
CLOCK
GS9015A
DD
I
DD
I
VCC1
VEE1
VEE1
ƒ/2
VEE3
SDO
SDO
SCO
SCO
SS1
SS0
CD
STAR
ROUTED
LOOP
VOLTAGE
See Figure 15
-5V
-5V
-5V
0.1
µ


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