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ACPL-337J Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-337J Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED |
6 / 18 page 6 Table 5. Electrical Specifications (DC) Unless otherwise noted, all typical values at TA = 25 °C, VCC1 = 5 V, VCC2 – VEE2 = 30 V, VE – VEE2 = 0 V; all Minimum/ Maximum specifications are at Recommended Operating Conditions. Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Logic Low Input Voltage VIN+L 0.8 V 25 Logic High Input Voltage VIN+H 2 V 25 Logic High LED Driver Output RDS(ON) RLEDDRVH 5.5 13.5 24 W ILEDDRV = -10 mA, VIN+ = 5 V 25 Logic Low LED Driver Output Voltage VLEDDRVL 0.2 0.4 0.8 V ILEDDRV = 2.4 mA, VIN+ = 0 V 25 Input Low Supply Current ICC1L 3 6 mA IF = 0 mA, VIN+ = 0 V 1 Input High Supply Current ICC1H 3 6 mA IF = 10 mA, VIN+=0 V 1 13 16 mA ILEDDRV = 10 mA , VIN+=5 V Output Low Supply Current ICC2L 4.3 6.5 mA IF = 0 mA 2, 3 Output High Supply Current ICC2H 5.4 7.5 mA IF = 10 mA 2, 3 LED Forward Voltage VF 1.2 1.55 1.95 V IF =10 mA 4 Temperature Coefficient of Input Forward Voltage ΔVF/ΔTA -1.7 mV/ °C IF = 10 mA LED Reverse Breakdown Voltage VBR 5 V IF = 10 µA Input Capacitance CIN 70 pF LED Turn on Current Threshold Low to High ITH+ 0.25 2 6 mA VOUT = 5 V LED Turn on Current Threshold High to Low ITH- 0.15 1.5 5.5 mA VOUT = 5 V LED Turn on Current Hysteresis ITH_HYS 0.5 mA High Level Output Current IOH -3 -4.0 A VCC2 - VOUT =15 V 5 1 Low Level Output Current IOL 3 3.5 A VOUT - VEE = 15 V 6 1 High Output Transistor RDS(ON) RDS,OH 0.5 2.3 4.5 W IOH = -3 A 5 2 Low Output Transistor RDS(ON) RDS,OL 0.2 1.4 3.6 W IOL = 3 A 6 2 Low Level Output Current During Fault Condition IOLF 55 115 170 mA VOUT - VEE = 14 V 9 3 High Level Output Voltage VOH VCC2– 0.5 VCC2 – 0.15 V IOUT = -100 mA 7 4, 5, 6 Low Level Output Voltage VOL 0.1 0.5 V IOUT = 100 mA 8 Clamp Threshold Voltage VTH_CLAMP 2 3 V Clamp Low Level Sinking Current ICLAMP 0.75 1.9 A VCLAMP = VEE + 2.5 Clamp Output Transistor RDS(ON) RDS,CLAMP 1.1 3.5 W ICLAMP = 1 A VCC2 UVLO Threshold Low to High VUVLO+ 11 12.5 13.7 V VOUT > 5 V 4, 6, 7 VCC2 UVLO Threshold High to Low VUVLO- 10.1 11.3 12.8 V VOUT < 5 V 4, 6, 8 VCC2 UVLO Hysteresis VUVLO_HYS 0.4 1.2 V DESAT Detection Threshold VDESAT 6.2 7 7.8 V 10 6 DESAT Charging Current ICHG 0.6 1.0 1.2 mA VDESAT = 2 V 11 6, 9 DESAT Discharging Current IDSCHG 20 58 mA VDESAT = 8 V 12 FAULT Logic Low Output Current IFAULT_L 4 9.0 mA VFAULT = 0.4 V FAULT Logic High Output Current IFAULT_H 20 µA VFAULT = 5 V UVLO Logic Low Output Current IUVLO_L 4 9.0 mA VUVLO = 0.4 V UVLO Logic High Output Current IUVLO_H 20 µA VUVLO = 5 V Notes: 1. Maximum pulse width = 10 µs. 2. Output is sourced at -3.0 A/3.0 A with a maximum pulse width = 10 µs. 3. For further details, see the description of operation during DESAT fault condition section in the application notes. 4. 15 V is the recommended minimum operating positive supply voltage (VCC2 – VE) to ensure adequate margin in excess of the maximum VUVLO+ threshold of 13.7 V. For High Level Output Voltage testing, VOH is measured with a DC load current. When driving capacitive loads, VOH will approach VCC as IOH approaches zero. 5. Maximum pulse width = 1.0 ms. 6. Once VOUT of ACPL-337J is allowed to go High (VCC2 – VE > VUVLO+), the DESAT detection feature of the ACPL-337J will be the primary source of IGBT protection. UVLO is needed to ensure DESAT is functional. Once VCC2 exceeds VUVLO+ threshold, DESAT will remain functional until VCC2 is below VUVLO- threshold. Thus, the DESAT detection and UVLO features of the ACPL-337J work in conjunction to ensure constant IGBT protection. 7. This is the “increasing” (i.e. turn-on or “positive going” direction) of VCC2 – VE. 8. This is the “decreasing” (i.e. turn-off or “negative going” direction) of VCC2 – VE. 9. For further details, see the DESAT fault detection blanking time section in the applications notes. |
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