UPD72874GC-YEB datasheet(11/40 Pages) NEC

Part #	UPD72874GC-YEB

Description	IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER

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Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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Preliminary Data Sheet S15306EJ2V0DS

11

µµµµPD72874

1.5 Serial ROM Interface Signals: (3 pins)

Name

I/O

Pin No.

IOL

Volts(V)

Function

Block *

GROM_SDA

I/O

116

6 mA

3.3

Serial EEPROM Data Input / Output

Link

GROM_SCL

O

117

6 mA

3.3

Serial EEPROM Clock Output

Link

GROM_EN

I

118

-

3.3

Serial EEPROM Enable

1: GUID Load enable

0: GUID Load disable

Link

Remark *: If the Link pin is pulled up, it should be connected to L_VDD.

1.6 D3cold Wake Up Function Signals: (2 pins)

Name

I/O

Pin No.

IOL

Volts(V)

Function

Block *

D3CSUP

I

114

-

5/3.3

D3cold Support

1: D3cold wake up enable

0: D3cold wake up disable

Link

RSMRST

I

74

-

5/3.3

Resume Reset

D3cold support (114 pin) = ‘1’

As this mode supports D3cold wake up,

RSMRST must connect system RSMRST

signal.

D3cold support (114 pin) = ‘0’

As this mode is the

µPD72872 compatible,

RSMRST clamp to ‘1’.

Link

Remark *: If the Link pin is pulled up, it should be connected to L_VDD.

1.7 IC: (7 pins)

Name

I/O

Pin No.

IOL

Volts(V)

Function

Block *

IC(H)

I

75

-

Internally Connected (High clamped)

Link

IC(L)

I

76 to 78, 80, 115

-

Internally Connected (Low clamped)

-

IC(N)

-

85

-

Internally Connected (Open)

-

Remark *: If the Link pin is pulled up, it should be connected to L_VDD.

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UPD72874GC-YEB Datasheet(PDF) 11 Page - NEC

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