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AS4C128M8D2-25BCN Datasheet(PDF) 6 Page - Alliance Semiconductor Corporation |
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AS4C128M8D2-25BCN Datasheet(HTML) 6 Page - Alliance Semiconductor Corporation |
6 / 59 page AS4C128M8D2 Alliance Memory Inc. 551 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice. 6 Rev. 1.0 June 2013 DM Input Data Input Mask: Input data is masked when DM is sampled HIGH during a write cycle. x8 device, the function of DM or RDQS/RQDS# is enabled by EMRS command. DQ0 – DQ7 Input / Output Data I/O: Bi-directional data bus. ODT Input On Die Termination: ODT enables internal termination resistance. It is applied to each DQ, DQS/DQS#, RDQS/RDQS# and DM signal. The ODT pin is ignored if the EMR (1) is programmed to disable ODT. VDD Supply Power Supply: +1.8V 0.1V VSS Supply Ground VDDL Supply DLL Power Supply: +1.8V 0.1V VSSDL Supply DLL Ground VDDQ Supply DQ Power: +1.8V 0.1V. VSSQ Supply DQ Ground VREF Supply Reference Voltage for Inputs: +0.5*VDDQ NC - No Connect: These pins should be left unconnected. |
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