Product Specification

PE42750

Page 3 of 10

Document No. 70-0334-07

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©2010-2012 Peregrine Semiconductor Corp. All rights reserved.

No.

Name

Description

1

GND

RF Ground

2

RF1

1

RF I/O

3

GND

RF Ground

4

GND

RF Ground

5

RFC

1

RF Common

6

GND

RF Ground

7

GND

RF Ground

8

RF2

1

RF I/O

9

GND

RF Ground

10

C2

2

Control 2 (or logic select)

11

C1

2

Control 1 (or logic select)

12

Supply

Pad

GND

Exposed Ground Paddle

Table 3. Pin Descriptions

Table 5. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS

®

device, observe the same

precautions that you would use with other ESD-sensitive

devices. Although this device contains circuitry to protect it from

damage due to ESD, precautions should be taken to avoid

exceeding the rating specified.

Table 4. Operating Conditions @ 25°C

Notes:

1.

RF pins 2, 5, and 8 must be at 0 VDC. The RF pins do not require

DC blocking capacitors for proper operation if the 0 V DC

requirement is met

2.

Pins 10 and 11 can be set for single pin control

3.

GND must be connected to exposed ground paddle to ensure

good isolation

Figure 3. Pin Configuration (Top View)

Parameter/Condition

Min

Max

Unit

-0.3

V

Terminated/Through 75

Ω

23/26

dBm

-55

+150

°C

MIL_STD 883, Method 3015.7

2000

V

JEDEC JESD22-A115-A

150

JEDEC JESD22-C101D

1000

-0.3

4.0

V

Parameter

Min

Typ

Max

Unit

2.7

3.0

3.63

V

8

μA

Control Voltage High

V

Control Voltage Low

0

V

Temperature

-40

+85

°C

RF1, RF2 Terminated/

Through 75

Ω

23/26

dBm

Exceeding absolute maximum ratings may cause permanent

damage. Operation between operating range maximum and

absolute maximum for extended periods may reduce reliability

.

Moisture Sensitivity Level

The Moisture Sensitivity Level rating for the PE42750 in

the 12-lead 3 x 3 x 0.75 mm QFN package is MSL1.

Switching Frequency

The PE42750 has a maximum 25 kHz switching rate.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS

®

devices are immune to latch-up.

Operation should be restricted to the limits in the Operating

Ranges table.

Table 6. Truth Table

1

C1

C2

RFC – RF1

RFC – RF2

OFF

2

Low

Low

OFF

OFF

ON

Low

Low

ON

OFF

ON

Low

High

OFF

ON

ON

High

Low

OFF

ON

ON

High

High

ON

OFF

Note: 1.

A versatile logic table has been established to allow either

C1 or C2 to act as a single pin control and in either polarity

2.

Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com