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P87C51MB2BA Datasheet(PDF) 7 Page - NXP Semiconductors |
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P87C51MB2BA Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 34 page 2001 Apr 06 7 Philips Semiconductors Preliminary specification P87C51MB2/P87C51MC2 80C51 8-bit microcontroller family with extended memory 64KB/96KB OTP with 2KB/3KB RAM PIN DESCRIPTIONS MNEMONIC PIN NO. TYPE NAME AND FUNCTION P0.0 - P0.7 43 - 36 I/O Port 0: Port 0 is an open drain, bidirectional I/O port. Port 0 pins that have 1s written to them float and can be used as high-impendance inputs. Port 0 is also the multiplexed low- order address and data bus during accesses to external program and data memory. In this application, it uses strong internal pull-ups when emitting 1s. P1.0 - P1.7 2 - 9 I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups on all pins. Port 1 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will source current because of the internal pull-ups. (Note: When SFR bit SPEN (SPCTL.6) is ’1’, the pull-ups at P1.4 and P1.5 are disabled.) 2 I/O P1.0 T2 Timer/Counter 2 external count input/Clockout 3 I P1.1 T2EX Timer/Counter 2 Reload/Capture/Direction Control 4 I P1.2 ECI External Clock Input to the PCA 5 I/O P1.3 CEX0 Capture/Compare External I/O for PCA module 0 6 I/O P1.4 CEX1 Capture/Compare External I/O for PCA module 1 (with pull-up on pin) I/O MOSI SPI Master Out/Slave In (Selected when SFR bit SPEN (SPCTL.6) is ’1’, in which case the pull-up for this pin is disabled) 7 I/O P1.5 CEX2 Capture/Compare External I/O for PCA module 2 (with pull-up on pin) I/O SPICLK SPI Clock (Selected when SFR bit SPEN (SPCTL.6) is ’1’, in which case the pull-up for this pin is disabled) 8 I/O P1.6 CEX3 Capture/Compare External I/O for PCA module 3 9 I/O P1.7 CEX4 Capture/Compare External I/O for PCA module 4 P2.0 - P2.7 24 - 31 I/O Port 2: Port 2 is a 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 2 pins that are externally being pulled low will source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL ). Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses ( MOVX @ DPTR) or 23-bit addresses (MOVX @EPTR, EMOV). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses ( MOV @ Ri), port2 emits the contents of the P2 Special Function Register. Note that when 23-bit address is used, address bits A16-A22 will be output to P2.0-P2.6 when ALE is High, and address bits A8-A14 are output to P2.0-P2.6 when ALE is Low. Address bit A15 is output on P2.7 regardless of ALE. P3.0 - P3.7 11,13 -19 I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that are externally pulled low will source current because of the internal pull-ups. 11 I P3.0 RXD0 Serial input port 0 13 O P3.1 TXD0 Serial output port 0 14 I P3.2 INT0 External interrupt 0 15 I P3.3 INT1 External interrupt 1 16 I P3.4 T0 Timer0 external input 17 I P3.5 T1 Timer1 external input 18 O P3.6 WR External data memory write strobe 19 O P3.7 RD External data memory read strobe |
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