3.3-V or 5-V regulated

0.1 F

µ

5-V accessory

5-V

System

Logic

µC or

System

Logic

10

SN74LVC1G86-Q1

SCES873 – MARCH 2017

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Product Folder Links: SN74LVC1G86-Q1

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Copyright © 2017, Texas Instruments Incorporated

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

suitable for down translation. This feature of the SN74LVC1G86-Q1 makes it ideal for various bus interface

applications.

9.2 Typical Application

Figure 4. Typical Application Schematic

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it

can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads,

so routing and load conditions should be considered to prevent ringing.

9.2.2 Detailed Design Procedure

1. Recommended Input Conditions

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For rise time and fall time specifications, see Δt/ΔV in the Recommended Operating Conditions table.

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2. Recommended Output Conditions

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Load currents should not exceed 32 mA per output and 50 mA total for the part.

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