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TLC5941PWP Datasheet(PDF) 7 Page - Texas Instruments |
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TLC5941PWP Datasheet(HTML) 7 Page - Texas Instruments |
7 / 34 page www.ti.com TLC5941 SLVS589D – JULY 2005 – REVISED JANUARY 2008 TERMINAL FUNCTION TERMINAL NT PWP RHB I/O DESCRIPTION NAME NO. NO. NO. Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. BLANK 23 2 31 I GS counter is also reset. When BLANK = L, OUTn are controlled by grayscale PWM control. GND 22 1 30 G Ground GSCLK 18 25 24 I Reference clock for grayscale PWM control IREF 20 27 26 I/O Reference current terminal NC - - 12, 13, 28, 29 No connection OUT0 28 7 4 O Constant-current output OUT1 1 8 5 O Constant-current output OUT2 2 9 6 O Constant-current output OUT3 3 10 7 O Constant-current output OUT4 4 11 8 O Constant-current output OUT5 5 12 9 O Constant-current output OUT6 6 13 10 O Constant-current output OUT7 7 14 11 O Constant-current output OUT8 8 15 14 O Constant-current output OUT9 9 16 15 O Constant-current output OUT10 10 17 16 O Constant-current output OUT11 11 18 17 O Constant-current output OUT12 12 19 18 O Constant-current output OUT13 13 20 19 O Constant-current output OUT14 14 21 20 O Constant-current output OUT15 15 22 21 O Constant-current output SCLK 25 4 1 I Serial data shift clock SIN 26 5 2 I Serial data input SOUT 17 24 23 O Serial data output TEST 19 26 25 I Test pin: TEST must be connected to VCC. VCC 21 28 27 I Power supply voltage. Input mode-change pin. When MODE = GND, the device is in GS MODE 27 6 3 I mode. When MODE = VCC, the device is in DC mode. Error output. XERR is an open-drain terminal. XERR goes L when XERR 16 23 22 O LOD or TEF is detected. Level triggered latch signal. When XLAT = high, the TLC5941 writes data from the input shift register to either GS register (MODE = low) or XLAT 24 3 32 I DC register (MODE = high). When XLAT=low, the data in the GS or DC registers is held constant and does not change. Copyright © 2005–2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TLC5941 |
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