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BQ24196RGER Datasheet(PDF) 5 Page - Texas Instruments |
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BQ24196RGER Datasheet(HTML) 5 Page - Texas Instruments |
5 / 50 page bq24196 www.ti.com SLUSB98A – OCTOBER 2012 – REVISED DECEMBER 2014 Pin Functions (continued) PIN TYPE DESCRIPTION NAME NUMBER Battery connection point to the positive terminal of the battery pack. The internal BATFET is connected between BAT and BAT 13,14 P SYS. Connect a 10 µF closely to the BAT pin. System connection point. The internal BATFET is connected between BAT and SYS. When the battery falls below the SYS 15,16 P minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage. (Refer to Application Information Section for inductor and capacitor selection.) Power ground connection for high-current power converter node. Internally, PGND is connected to the source of the n- PGND 17,18 P channel LSFET. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. A single point connection is recommended between power PGND and the analog GND near the IC PGND pin. O Switching node connecting to output inductor. Internally SW is connected to the source of the n-channel HSFET and the SW 19,20 drain of the n-channel LSFET. Connect the 0.047-µF bootstrap capacitor from SW to BTST. Analog PWM high side driver positive supply. Internally, the BTST is connected to the anode of the boost-strap diode. Connect BTST 21 P the 0.047-µF bootstrap capacitor from SW to BTST. PWM low side driver positive supply output. Internally, REGN is connected to the cathode of the boost-strap diode. REGN 22 P Connect a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also serves as bias rail of TS1 and TS2 pins. Connected to the drain of the reverse blocking MOSFET and the drain of HSFET. Given the total input capacitance, O PMID 23 connect a 1-µF capacitor on VBUS to PGND, and the rest all on PMID to PGND. (Refer to Application Information Section Analog for details) Thermal Exposed pad beneath the IC for heat dissipation. Always solder thermal pad to the board, and have vias on the thermal – P Pad pad plane star-connecting to PGND and ground plane for high-current power converter. 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VBUS –2 22 V PMID –0.3 22 V STAT, PG –0.3 20 V BTST –0.3 26 V Voltage range (with SW –2 20 V respect to GND) BAT, SYS (converter not switching) –0.3 6 V SDA, SCL, INT, OTG, ILIM, REGN, TS1, TS2, CE, PSEL –0.3 7 V BTST TO SW –0.3 –7 V PGND to GND –0.3 –0.3 V Output sink current INT, STAT, PG 6 mA Junction temperature –40°C 150 °C Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. 7.2 ESD Ratings VALUE UNIT Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 1000 V(ESD) Electrostatic discharge V Charged device model (CDM), per JEDEC specification JESD22- 250 C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Copyright © 2012–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: bq24196 |
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