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TMS320DM365 Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320DM365 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 210 page TMS320DM365 SPRS457E – MARCH 2009 – REVISED JUNE 2011 www.ti.com • Hardware 3A statistics collection module • Four 64-Bit General-Purpose Timers (each (H3A) configurable as two 32-bit timers) – Back End Provides: • One 64-Bit Watch Dog Timer • Hardware On-Screen Display (OSD) • Two UARTs (One fast UART with RTS and CTS Flow Control) • Composite NTSC/PAL video encoder output • Five Serial Port Interfaces (SPI) each with two Chip-Selects • 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output • One Master/Slave Inter-Integrated Circuit (I2C) Bus ™ • 3 DACs for HD Analog Video Output • One Multi-Channel Buffered Serial Port • LCD Controller (McBSP) • BT.601/BT.656 Digital YCbCr 4:2:2 – I2S (8-/16-Bit) Interface – AC97 Audio Codec Interface • Analog-to-Digital Convertor (ADC) – S/PDIF via Software • Power Management and Real Time Clock Subsystem (PRTCSS) – Standard Voice Codec Interface (AIC12) – Real Time Clock – SPI Protocol (Master Mode Only) • 16-Bit Host-Port Interface (HPI) – Direct Interface to T1/E1 Framers • 10/100 Mb/s Ethernet Media Access Controller – Time Division Multiplexed Mode (TDM) (EMAC) - Digital Media – 128 Channel Mode – IEEE 802.3 Compliant • Four Pulse Width Modulator (PWM) Outputs – Supports Media Independent Interface (MII) • Four RTO (Real Time Out) Outputs – Management Data I/O (MDIO) Module • Up to 104 General-Purpose I/O (GPIO) Pins • Key Scan (Multiplexed with Other Device Functions) • Voice Codec • Boot Modes • External Memory Interfaces (EMIFs) – On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, – DDR2 and mDDR SDRAM 16-bit wide EMIF SPI, EMAC, or HPI With 256 MByte Address Space (1.8-V I/O) – AEMIF (NOR and OneNAND) – Asynchronous16-/8-bit Wide EMIF (AEMIF) • Configurable Power-Saving Modes • Flash Memory Interfaces • Crystal or External Clock Input (typically – NAND (8-/16-bit Wide Data) 19.2 MHz, 24 MHz, 27 MHz or 36 MHz) – 16 MB NOR Flash, SRAM • Flexible PLL Clock Generators – OneNAND(16-bit Wide Data) • Debug Interface Support • Flash Card Interfaces – IEEE-1149.1 (JTAG™) – Two Multimedia Card (MMC) / Secure Digital Boundary-Scan-Compatible (SD/SDIO) – ETB (Embedded Trace Buffer) with 4K-Bytes – SmartMedia/xD Trace Buffer memory • Enhanced Direct-Memory-Access (EDMA) – Device Revision ID Readable by ARM Controller (64 Independent Channels) • 338-Pin Ball Grid Array (BGA) Package • USB Port with Integrated 2.0 High-Speed PHY (ZCE Suffix), 0.65-mm Ball Pitch that Supports • 65nm Process Technology – USB 2.0 High-Speed Device • 3.3-V and 1.8-V I/O, 1.2-V/ 1.35-V Internal – USB 2.0 High-Speed Host (mini-host, • Community Resources supporting one external device) – TI E2E Community – USB On The Go (HS-USB OTG) – TI Embedded Processors Wiki 2 TMS320DM365 Digital Media System-on-Chip (DMSoC) Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM365 |
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