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TPA3110D2PWP Datasheet(PDF) 4 Page - Texas Instruments |
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TPA3110D2PWP Datasheet(HTML) 4 Page - Texas Instruments |
4 / 35 page 1 2 3 4 5 6 7 8 9 10 28 27 26 25 24 23 22 21 20 19 SD FAULT LINP LINN GAIN0 GAIN1 AVCC AGND GVDD PLIMIT PVCCL PVCCL BSPL OUTPL PGND OUTNL BSNL BSNR OUTNR PGND RINN RINP NC 11 12 13 14 18 17 16 15 OUTPR BSPR PVCCR PVCCR PBTL 4 TPA3110D2 SLOS528F – JULY 2009 – REVISED APRIL 2017 www.ti.com Product Folder Links: TPA3110D2 Submit Documentation Feedback Copyright © 2009–2017, Texas Instruments Incorporated 5 Device Comparison Table DEVICE NUMBER SPEAKER CHANNELS SPEAKER AMP TYPE OUTPUT POWER (W) ADDITIONAL FEATURES TPA3110D2 Stereo Class D 15 Power limiter TPA3130D1 Stereo Class D 15 TPA3118D2 Stereo Class D 30 Power limiter TPA3116D1 Stereo Class D 50 Power limiter 6 Pin Configuration and F unctions PWP Package 28-Pin HTSSOP With PowerPAD™ Top View Table 1. Pin Functions PIN TYPE DESCRIPTION NO. NAME 1 SD I Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs enabled). TTL logic levels with compliance to AVCC. 2 FAULT O Open drain output used to display short circuit or dc detect fault status. Voltage compliant to AVCC. Short circuit faults can be set to auto-recovery by connecting FAULT pin to SD pin. Otherwise, both short circuit faults and dc detect faults must be reset by cycling PVCC. 3 LINP I Positive audio input for left channel. Biased at 3 V. 4 LINN I Negative audio input for left channel. Biased at 3 V. 5 GAIN0 I Gain select least significant bit. TTL logic levels with compliance to AVCC. 6 GAIN1 I Gain select most significant bit. TTL logic levels with compliance to AVCC. 7 AVCC P Analog supply 8 AGND — Analog signal ground. Connect to the thermal pad. 9 GVDD O High-side FET gate drive supply. Nominal voltage is 7V. Also should be used as supply for PLIMIT function. 10 PLIMIT I Power limit level adjust. Connect a resistor divider from GVDD to GND to set power limit. Connect directly to GVDD for no power limit. 11 RINN I Negative audio input for right channel. Biased at 3 V. 12 RINP I Positive audio input for right channel. Biased at 3 V. 13 NC — Not connected 14 PBTL I Parallel BTL mode switch |
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