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W741E20X Datasheet(PDF) 10 Page - Winbond |
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W741E20X Datasheet(HTML) 10 Page - Winbond |
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10 / 84 page  Preliminary W741E20X - 10 - Q1 Q2 Q9 Q10 Q11 Q12 Q14 Q13 Fosc S R Q HEF.0 IEF.0 1. Reset 2. CLR EVF, #01H EVF.0 Hold mode release (HCF.0) Divider0 interrupt (INT0) ... Overflow signal WDT Enable /Disable PMF.3 Fosc/1024 Fosc/16384 Mask Option Qw1 Qw2 Qw4 Qw3 RRR R Divider0 System Reset 1. Reset 2. CLR WDT 3. CLR DIVR0 R R R R Figure 4. Organization of Divider and Watchdog Timer Parameter Flag (PMF) The parameter flag is organized as a 4-bit binary register (PMF.0 to PMF.3). The PMF is controlled by the SET PMF, #I or CLR PMF, #I instruction. The bit descriptions are as follows: W 0 1 2 3 PMF Note: W means write only. Bit 0, Bit 1 & Bit 2 are reserved. Bit 3 = 0 The fundamental frequency of the watch dog timer is Fosc/1024. = 1 The fundamental frequency of the watch dog timer is Fosc/16384. At initial reset, bit 3 of PMF is set to "0". |
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