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ST7LITEUS5 Datasheet(PDF) 11 Page - STMicroelectronics |
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ST7LITEUS5 Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 136 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) ST7LITEUS2, ST7LITEUS5 Introduction 11/136 1 Introduction The ST7LITEUS2 and ST7LITEUS5 are members of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. The ST7LITEUS2 and ST7LITEUS5 feature FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability. Under software control, the ST7LITEUS2 and ST7LITEUS5 can be placed in Wait, Slow, or Halt mode, reducing power consumption when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 microcontrollers feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes. For easy reference, all parametric data are located in Section 12 on page 92. The devices feature an on-chip debug module (DM) to support in-circuit debugging (ICD). For a description of the DM registers, refer to the ST7 I2C protocol reference manual. Figure 1. General block diagram 8-BIT CORE ALU PA3 / RESET PORT A 10-BIT ADC with WATCHDOG Internal Clock CONTROL RAM (128 Bytes) PA5:0 (6 bits) VSS VDD POWER SUPPLY 8-MHz RC OSC LITE TIMER MEMORY 12-BIT AUTO- RELOAD TIMER FLASH 1 KByte LVD AWU RC OSC External Clock Obsolete Product(s) - Obsolete Product(s) |
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