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AD9248BCPZRL7-65 Datasheet(PDF) 5 Page - Analog Devices |
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AD9248BCPZRL7-65 Datasheet(HTML) 5 Page - Analog Devices |
5 / 23 page Preliminary Technical Data AD9248 Rev. PrE | Page 5 of 23 DC SPECIFICATIONS (CONTINUED) Table 2. (AVDD = 3 V, DRVDD = 2.5 V, Maximum Sample Rate, CLK_A = CLK_B; AIN = -0.5 dBFS Differential Input, 1.0 V Internal Reference, TMIN to TMAX, unless otherwise noted.) Test AD9248BST/BCP- 20 AD9248BST/BCP- 40 AD9248BST/BCP- 65 Unit Parameter Temp Level Min Typ Max Min Typ Max Min Typ Max LOGIC INPUTS High Level Input Voltage Full IV 2.0 2.0 2.0 V Low Level Input Voltage Full IV 0.8 0.8 0.8 V High Level Input Current Full IV - 10 +10 - 10 +10 - 10 +10 µA Low Level Input Current Full IV - 10 +10 - 10 +10 - 10 +10 µA Input Capacitance Full IV 2 2 2 pF LOGIC OUTPUTS 1 DRVDD = 3.3V High Level Output Voltage Full IV 3.29 3.29 3.29 V (IOH = 50 mA) High Level Output Voltage Full IV 3.25 3.25 3.25 V (IOH = 0.5 mA) Low Level Output Voltage Full IV 0.05 0.05 0.05 V (IOL = 50 mA) Low Level Output Voltage Full IV 0.2 0.2 0.2 V (IOL = 1.6 mA) DRVDD = 2.5V High Level Output Voltage Full IV 2.49 2.49 2.49 V (IOH = 50 mA) High Level Output Voltage Full IV 2.45 2.45 2.45 V (IOH = 0.5 mA) Low Level Output Voltage Full IV 0.05 0.05 0.05 V (IOL = 50 mA) Low Level Output Voltage Full IV 0.2 0.2 0.2 V (IOL = 1.6 mA) 1 Output Voltage Levels measured with 5 pF load on each output. Specifications subject to change without notice. |
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