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TPS53317RGBT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS53317RGBT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 35 page TPS53317 SLUSAK4D – JUNE 2011 – REVISED JULY 2015 www.ti.com Table of Contents 7.3 Feature Description................................................. 12 1 Features .................................................................. 1 7.4 Device Functional Modes........................................ 16 2 Applications ........................................................... 1 8 Application and Implementation ........................ 20 3 Description ............................................................. 1 8.1 Application Information............................................ 20 4 Revision History..................................................... 2 8.2 Typical Applications ............................................... 20 5 Pin Configuration and Functions ......................... 4 9 Power Supply Recommendations ...................... 26 6 Specifications......................................................... 5 10 Layout................................................................... 26 6.1 Absolute Maximum Ratings ...................................... 5 10.1 Layout Guidelines ................................................. 26 6.2 ESD Ratings.............................................................. 5 10.2 Layout Example .................................................... 26 6.3 Recommended Operating Conditions ....................... 5 11 Device and Documentation Support ................. 27 6.4 Thermal Information .................................................. 6 11.1 Community Resources.......................................... 27 6.5 Electrical Characteristics........................................... 6 11.2 Trademarks ........................................................... 27 6.6 Typical Characteristics .............................................. 8 11.3 Electrostatic Discharge Caution ............................ 27 7 Detailed Description ............................................ 11 11.4 Glossary ................................................................ 27 7.1 Overview ................................................................. 11 12 Mechanical, Packaging, and Orderable 7.2 Functional Block Diagram ....................................... 11 Information ........................................................... 27 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (November 2013) to Revision D Page • Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 • Added "SW (transient 20 ns and E = 5 µJ)" specification in Absolute Maximum Ratings table ............................................ 5 • Added Figure 41 .................................................................................................................................................................. 26 Changes from Revision B (MAY 2012) to Revision C Page • Added clarity to Pin Configuration and Functions table ......................................................................................................... 4 • Added clarity to Internal soft-start delay time and soft-start time test conditions in Electrical Characteristics table.............. 7 • Added Figure 17, Figure 19 and Figure 20 in Power Sequences section............................................................................ 13 • Added clarity to Output Overvoltage Protection (OVP) section............................................................................................ 15 • Changed minimum valley OCL from "is 6 A or 4 A" to "is 7.6 A or 5.4 A" in Overcurrent Limit section. ............................. 15 • Changed "the absolute value of the negative OCL set point is typically -6.5 A or -4.5 A" to "the typical value of the negative OCL set point is –9.3 A or –6.5 A" in Negative OCL section................................................................................. 16 • Added clarity to Layout Guidelines section. ......................................................................................................................... 26 Changes from Revision A (JULY 2011) to Revision B Page • Added Memory Termination bullet in APPLICATIONS .......................................................................................................... 1 • Added clarity to ...................................................................................................................................................................... 1 • Added updates to Table 1 .................................................................................................................................................... 19 2 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: TPS53317 |
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