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ICS8745BI Datasheet(PDF) 6 Page - Integrated Device Technology

Part # ICS8745BI
Description  1:5 Differential-to-LVDS Zero Delay Clock Generator
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS8745BI Datasheet(HTML) 6 Page - Integrated Device Technology

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ICS8745BYI REVISION D JUNE 11, 2009
6
©2009 Integrated Device Technology, Inc.
ICS8745BI Data Sheet
1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR
Table 4C. Differential DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
NOTE 1: VIL should not be less than -0.3V
NOTE 2: For single-ended applications, the maximum input voltage for CLKx, nCLKx is VDD + 0.3V.
Table 4D. LVDS DC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Table 5. Input Frequency Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
IIH
Input High Current
CLK0, CLK1,
FB_IN
VDD = VIN = 3.465V
150
µA
nCLK0, nCLK1,
nFB_IN
VDD = VIN = 3.465V
5
µA
IIL
Input Low Current
CLK0, CLK1,
FB_IN
VDD = 3.465V,
VIN = 0V
-5
µA
nCLK0, nCLK1,
nFB_IN
VDD = 3.465V,
VIN = 0V
-150
µA
VPP
Peak-to-Peak Voltage; NOTE 1
0.15
1.3
V
VCMR
Common Mode Input Voltage; NOTE 1, 2
GND + 0.5
VDD – 0.85
V
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOD
Differential Output Voltage
320
440
550
mV
∆V
OD
VOD Magnitude Change
0
50
mV
VOS
Offset Voltage
1.05
1.2
1.35
V
∆V
OS
VOS Magnitude Change
25
mV
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
FIN
Input Frequency
CLK0/nCLK0,
CLK1/nCLK1
PLL_SEL = 1
31.25
700
µA
PLL_SEL = 0
700
V


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