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ADC12DJ3200AAV Datasheet(PDF) 10 Page - Texas Instruments

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Part # ADC12DJ3200AAV
Description  6.4-GSPS Single Channel or 3.2-GSPS Dual Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC)
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DJ3200AAV Datasheet(HTML) 10 Page - Texas Instruments

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10
ADC12DJ3200
SLVSD97 – MAY 2017
www.ti.com
Product Folder Links: ADC12DJ3200
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Copyright © 2017, Texas Instruments Incorporated
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
NOTE
Power down of the high speed data outputs (DA0+/– ... DA7+/–, DB0+/– ... DB7+/–) for
extended times may reduce performance of the output serializers, especially at high data
rates. Power down of the serializers occurs when the PD pin is held high, the MODE
register is programmed to a value other than 0x00 or 0x01, PD_ACH or PD_BCH registers
settings are programmed to 1 or when the JMODE register setting is programmed to a
mode that uses less than the 16 total lanes the device allows. For instance, JMODE 0
uses eight total lanes and therefore the four highest indexed lanes for each JESD204B
link (DA4+/– ... DA7+/–, DB4+/– ... DB7+/–) are powered down in this mode. When the PD
pin is held high or the MODE register is programmed to a value other than 0x00 or 0x01
then all of the output serializers are powered down. When PD_ACH or PD_BCH register
settings are programmed to 1 the associated ADC channel and lanes are powered down.
To prevent unreliable operation the PD pin and MODE register should only be used for
brief periods of time to measure temperature diode offsets and not used for long-term
power savings. Further, use of a JMODE that uses fewer than 16 lanes will result in
unreliable operation of the unused lanes. If the system will never use the unused lanes
during the lifetime of the device then the unused lanes will not cause issues and can be
powered down. If the system may make use of the unused lanes at a later time, the
reliable operation of the serializer outputs can be maintained by enabling JEXTRA_A and
JEXTRA_B which results in VD11 power consumption to increase and the output
serializers to toggle.
6.4 Thermal Information
THERMAL METRIC(1)
ADC12DJ3200
UNIT
AAV (FCBGA)
144 PINS
RθJA
Junction-to-ambient thermal resistance
25.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
1.1
°C/W
RθJB
Junction-to-board thermal resistance
8.2
°C/W
ψJT
Junction-to-top characterization parameter
0.1
°C/W
ψJB
Junction-to-board characterization parameter
8.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W


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