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CL10A105KA8NNNC Datasheet(PDF) 6 Page - MagnaChip Semiconductor. |
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CL10A105KA8NNNC Datasheet(HTML) 6 Page - MagnaChip Semiconductor. |
6 / 9 page Confidential Datasheet Version 1.0 July 2015. Revision 1.0 MagnaChip Semiconductor Ltd. 6 Operation The MAP7103 provided a regulated supply voltage for panel source driver ICs. The MAP7103 uses a constant frequency, peak current mode PWM(Pulse Width Modulation) boost regulation architecture to regulate the feedback voltage. At the beginning of each cycle, the N-channel MOSFET switch is turned on, forcing the inductor current to rise. The current at the source of the switch is internally measured and converted to a voltage by the current sense amplifier. That voltage is compared to the error voltage at COMP. The voltage at the output of the error amplifier is an amplified version of the difference between the 1.25V reference voltage and the feedback voltage voltage. When these two voltage are equal, the PWM comparator turns off the switch forcing the inductor current to the output capacitor through the external rectifier. This causes the inductor current to decrease. The peak inductor current is controlled by the voltage at COMP, which in turn is controlled by the output voltage. Thus the output voltage is regulated by the inductor current to satisfy the load. The use of current mode regulation improves transient response and control loop stability. Application Information Soft-Start Capacitor The MAP7103 provides soft-start function to minimize the inrush current at the input. This prevents faults tripping of the input voltage at startup due to input current overshoot. When powered on, a 5uA internal constant current charges an external capacitor at SS pin. As the SS capacitor is charged, the voltage at SS rises. The MAP7103 internally clamps the voltage at COMP to 700mV above the voltage at SS. The soft-start ends when the voltage at SS reaches 1.25V. This limits the inductor current at startup, forcing the input current to rise slowly to the current required to regulate the output voltage. The soft-start period is determined by the equation : tSS = CSS x V / I where CSS is the soft-start capacitor from SS to GND, V is reference voltage and I is charging current If CSS=33nF, the internal soft-start function will be turned on and period time is approximately 8ms. Setting the Output Voltage The regulated output voltage is shown as the following equation where VREF=1.25V (typ.) The recommended voltage for R2 should be at least 10kΩ Selecting the input Capacitor Lower ESR ceramic capacitor are recommended for input capacitor applications. Low ESR will reduce the Input voltage ripple caused by switching operation. A 10uF capacitor is sufficient for most applications. Selecting the Output Capacitor The output capacitor is required to maintain the DC output voltage. Low ESR capacitor are preferred to keep the output voltage ripple to a minimum. The characteristic of the output capacitor also affects the stability of the regulation control system. The output voltage ripple is shown as the following equation: where VRIPPLE is the output ripple voltage, VIN and VOUT are the DC Input and output voltages respectively, ILOAD is the load current, fSW is the switching frequency, and COUT is the capacitance of the output capacitor |
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