AS4C128M16D3LB-12BCN datasheet(2/45 Pages) ALSC

Part #	AS4C128M16D3LB-12BCN

Description	Eight internal banks for concurrent operation

Download	45 Pages

Scroll/Zoom	100%

Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

Logo

2 / 45 page

Specifications

-

Density : 2G bits

-

Organization :

- 16M words x 16 bits x 8 banks

-

Package :

- 96-ball FBGA

- Lead-free (RoHS compliant) and Halogen-free

-

Power supply : VDD, VDDQ = 1.35V (1.283V to 1.45V)

- Backward compatible to VDD, VDDQ = 1.5V ± 0.075V

-

Data rate : 1600Mbps

-

2KB page size

- Row address: A0 to A13

- Column address: A0 to A9

-

Eight internal banks for concurrent operation

-

Burst lengths (BL) : 8 and 4 with Burst Chop (BC)

-

Burst type (BT) :

- Sequential (8, 4 with BC)

- Interleave (8, 4 with BC)

-

CAS Latency (CL) : 5, 6, 7, 8, 9, 10, 11

-

CAS Write Latency (CWL) : 5, 6, 7, 8

-

Precharge : auto precharge option for each burst access

-

Driver strength : RZQ/7, RZQ/6 (RZQ = 240

Ω)

-

Refresh : auto-refresh, self-refresh

-

Refresh cycles :

- Average refresh period

7.8

μs at 0°C ≤ Tc ≤ +85°C

3.9

μs at +85°C < Tc ≤ +95°C

-

Operating case temperature range

- Comercial Tc = 0°C to +95°C

Features

-

Double-data-rate architecture; two data transfers per clock cycle

-

The high-speed data transfer is realized by the 8 bits prefetch pipe-

lined architecture

-

Bi-directional differential data strobe (DQS and DQS) is transmitted/

received with data for capturing data at the receiver

-

DQS is edge-aligned with data for READs; center-aligned with data

for WRITEs

-

Differential clock inputs (CK and CK)

-

DLL aligns DQ and DQS transitions with CK transitions

-

Commands entered on each positive CK edge; data and data mask

referenced to both edges of DQS

-

Data mask (DM) for write data

-

Posted CAS by programmable additive latency for better command

and data bus efficiency

-

On-Die Termination (ODT) for better signal quality

- Synchronous ODT

- Dynamic ODT

- Asynchronous ODT

-

Multi Purpose Register (MPR) for pre-defined pattern read out

-

ZQ calibration for DQ drive and ODT

-

RESET pin for Power-up sequence and reset function

-

SRT range : Normal/extended

-

Programmable Output driver impedance control

Table1.OrderingInformation

Part Number

Org

Temperature

MaxClock (MHz)

Package

AS4C128M16D3LB-12BCN 128Mx16

Commercial(Extended)

0°Cto

95°C

800

96-ballFBGA

Table2.SpeedGradeInformation

Speed Grade

Clock Frequency

CAS Latency

tRCD (ns)

tRP (ns)

DDR3L-1600

800MHz

1

AS4C128M16D3LB-12BCN

Confidential

- 2/45 -

Rev.1.0 Mar 2016

1

3.75

1

3.75

Similar Part No. - AS4C128M16D3LB-12BCN

Manufacturer	Part #	Datasheet	Description
Alliance Semiconductor ...	AS4C128M16D3LB	3Mb / 45P	96 ball FBGA PACKAGE

More results

Similar Description - AS4C128M16D3LB-12BCN

Manufacturer	Part #	Datasheet	Description
Alliance Semiconductor ...	AS4C256M16D3B-12BCN	2Mb / 41P	Eight internal banks for concurrent operation
	AS4C256M16D3LB-12BCN	1Mb / 46P	Eight internal banks for concurrent operation
	1GB-DDR3L-AS4C128M8D3L	3Mb / 88P	internal banks for concurrent operation
Integrated Silicon Solu...	IS43LD16160A	6Mb / 143P	Four internal banks for concurrent operation
Alliance Semiconductor ...	AS4C32M16MD1	4Mb / 75P	Four internal banks for concurrent operation
Integrated Silicon Solu...	IS43LR32400G	1Mb / 43P	Four internal banks for concurrent operation
	IS43R16400B	4Mb / 57P	Four internal banks for concurrent operation
	IS43LR16640A	1Mb / 43P	Four internal banks for concurrent operation
	IS43R32400D	1Mb / 57P	Four internal banks for concurrent operation
Alliance Semiconductor ...	AS4C16M32MD1	2Mb / 58P	Four internal banks for concurrent operation

More results

AS4C128M16D3LB-12BCN Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation

AS4C128M16D3LB-12BCN Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation

Similar Part No. - AS4C128M16D3LB-12BCN

Similar Description - AS4C128M16D3LB-12BCN

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL