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NCP1530DM33R2 Datasheet(PDF) 11 Page - ON Semiconductor |
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NCP1530DM33R2 Datasheet(HTML) 11 Page - ON Semiconductor |
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11 / 16 page  NCP1530 http://onsemi.com 11 DETAILED OPERATING DESCRIPTION Introduction The NCP1530 series are step−down converters with a smart control scheme that operates with 600 kHz fixed Pulse Width Modulation (PWM) at moderate to heavy load currents, so that high efficiency, noise free output voltage can be generated. In order to improve the system efficiency at light loads, this device can be configured to work in auto−mode. In auto−mode operation, the control unit will detect the loading condition and switch to power saving Pulse Frequency Modulation (PFM) control scheme at light load. With these enhanced features, the converter can achieve high operating efficiency for all loading conditions. Additionally, the switching frequency can also be synchronized to external clock signal in between 600 kHz to 1.2 MHz range. The converter uses peak current mode PWM control as a core, with the high switching frequency incorporated. Good line and load regulation can be achieved easily with small value ceramic input and output capacitors. Internal integrated compensation voltage ramp ensures stable operation at all operating modes. NCP1530 series are designed to support up to 600 mA output current with cycle−by−cycle current limit protection. The Internal Oscillator The oscillator that governs the switching of the PWM control cycle is self contained and no external timing component is required to setup the switching frequency. For PWM mode and auto−mode operation, all timing signals required for proper operation are derived from the internal oscillator. The internal fix frequency oscillator is trimmed to run at 600 kHz " 20% over full temperature range. In case the device is forced to operate at Synchronization mode by applying an external clock signal to SYN pin (pin 2), the external clock signal will supersede the internal oscillator and take charge of the switching operation. Voltage Reference and Soft−Start An internal high accuracy voltage reference is included in NCP1530. This reference voltage governs all internal reference levels in various functional blocks required for proper operation. This reference voltage is precisely trimmed to 1.2 V " 1.5% over full temperature range. The reference voltage can be accessed externally at VREF pin (pin 7), with an external capacitor, CREF of 1.0 mF, privding up to 5.0 mA of loading. Additionally, NCP1530 has a Soft−Start circuit built around the voltage reference block that provide limits to the inrush current during start−up by controlling the ramp up of the internal voltage reference. The soft−start time can be user adjusted by an external capacitor, CSS, connecting to the SS pin (pin 3). During converter powerup, a 50 nA current flowing out from the SS pin will charge−up the timing capacitor. The voltage across the SS pin controls the ramp up of the internal reference voltage by slowly releasing it until the nominal value is reached. For an external timing capacitor of value CSS = 100 pF, the soft−start time is about 5.0 ms including the small logic delay time, Figure 33 and 34. In the case where the SS pin is left floating, a small built−in capacitor together with other parasitic capacitance will provide a minimum intrinsic soft−start time of 500 ms. As the soft−start function is implemented by simple circuitry, the final timing depends on non−linear functions, where accurate deterination of the soft−start timing is impossible. However, for simplicity, the empirical formula below can be used to estimate the soft−start time with respect to the value of the external capacitor. tSS in ms [ 50 CSS in pF ) 500 ms Current Mode Pulse−Width Modulation (PWM) Control Scheme With the SYN pin (pin 2) connected to VIN, the converter will set to operate at constant switching frequency PWM mode. NCP1530 uses peak current mode control scheme to achieve good line and load regulation. The high switching frequency, 600 kHz, and a carefully compensated internal control loop, allows the use of low profile small value ceramic type input and output capacitor for stable operation. In current mode operation, the required ramp function is generated by sensing the inductor current (ISEN) and comparing with the voltage loop error amplifier (OTA) output. The OTA output is derived from feedback from the output voltage pin (VOUT − Pin 6) and the internal reference voltage (VREF − Pin 7). See Figure 2. On a cycle−by−cycle basis, the duty cycle is controlled to keep the output voltage within regulation. The current mode approach has outstanding line regulation performance and good overall system stability. Additionally, by monitoring the inductor current, a cycle−by−cycle current limit protection is implemented. Constant Frequency PWM scheme reduces output ripple and noise, which is one of the important characteristics for noise sensitive communication applications. The high switching frequency allows the use of small size surface mount components that saves significant PC board area and improves layout compactness and EMI performance. |
Similar Part No. - NCP1530DM33R2 |
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Similar Description - NCP1530DM33R2 |
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