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TMP116N Datasheet(PDF) 4 Page - Texas Instruments |
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TMP116N Datasheet(HTML) 4 Page - Texas Instruments |
4 / 46 page 4 TMP116, TMP116N SBOS740 – MAY 2017 www.ti.com Product Folder Links: TMP116 TMP116N Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 6 Specifications 6.1 Absolute Maximum Ratings MIN MAX UNIT Supply voltage, V+ –0.3 6 V Voltage at SCL, SDA, ALERT, and ADD0 –0.3 6 V Operating junction temperature, TJ –55 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 6.3 Recommended Operating Conditions MIN NOM MAX UNIT V+ Supply voltage 1.9 3.3 5.5 V TA Operating free-air temperature –55 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.4 Thermal Information THERMAL METRIC(1) TMP116 UNIT DRV (WSON) 6 PINS RθJA Junction-to-ambient thermal resistance 68.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 70.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 9.5 °C/W RθJB Junction-to-board thermal resistance 38.3 °C/W ψJT Junction-to-top characterization parameter 1.7 °C/W ψJB Junction-to-board characterization parameter 38.6 °C/W |
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