SN74AHC32Q-Q1

QUADRUPLE 2-INPUT POSITIVE-OR GATE

SGDS019 – FEBRUARY 2002

1

POST OFFICE BOX 655303

Can Be Supported Along With

Major-Change Approval

CMOS) Process

JESD 17

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

† Contact factory for details. Q100 qualification data available on

request.

description

The SN74AHC32Q is a quadruple 2-input positive-OR gate. This device performs the Boolean function

Y

+ A • B or Y + A ) B in positive logic.

ORDERING INFORMATION

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

40

°

°C

SOIC – D

Tape and reel

SN74AHC32QDRQ1

AHC32Q

–40

°C to 125°C

TSSOP – PW

Tape and reel

SN74AHC32QPWRQ1

HA32Q

‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

Y

H

X

H

X

HH

L

L

L

Copyright

 2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

3Y

D OR PW PACKAGE

(TOP VIEW)