TFDU4203

Vishay Semiconductors

Rev. A1.1, 13-Feb-03

8 (12)

www.vishay.com

Document Number 82542

Recommended SMD Pad Layout

0.5

7 x 0.8

8

0.8

1

2.3

Transceiver leads to be soldered symmetrically on pads

Figure 2. Pad Layout

Temperature Derating

50

55

60

65

70

75

80

85

90

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

Operating Voltage [V] @ duty cycle 20%

°

Figure 3. shows the maximum operating temperature

when the device is operated without external current

limiting resistor. A power dissipating resistor of 2

Ω is

recommended from the cathode of the IRED to Ground

for supply voltages above 4 V. In that case the device can

be operated up to 85

°C, too.

Table 1. Truth table

Inputs

Outputs

SD

Txd

Optical input Irradiance

Rxd

Transmitter

high

x

x

floating

0

low

high

x

high

low

high > 25

µs

x

high

0

low

low

< 4

high

0

low

low

> Min Detection

Threshold Irradiance

< Max Detection

Threshold Irradiance

low

0

low

low

> Max Detection

Threshold Irradiance

x

0