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STMPE1600QTR Datasheet(PDF) 8 Page - STMicroelectronics |
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STMPE1600QTR Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 27 page I2C block STMPE1600 8/27 Doc ID 16938 Rev 3 Table 4. I2C bus timing Symbol Parameter Min Typ Max Uni fSCL SCL clock frequency 0 – 400 kHz tLOW Clock low period 1.3 – – µs tHIGH Clock high period 600 – – ns tF SDA and SCL fall time – – 300 ns tHD:STA START condition hold time (after this period the first clock is generated) 600 – – ns tSU:STA START condition setup time (only relevant for a repeated start period) 600 – – ns tSU:DAT Data setup time 100 – – ns tHD:DAT Data hold time 0 – – µs tSU:STO STOP condition setup time 600 – – ns tBUF Time the bus must be free before a new transmission can start 1.3 – – µs |
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