Two-Phase Desktop CPU Core Supply Controllers

with Controlled VID Change

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11

Pin Description

PIN

NAME

FUNCTION

1

VID0

Voltage Identification Input Bit 0. See Table 1. Internal 100k

2

VID1

Voltage Identification Input Bit 1. See Table 1. Internal 100k

3

TIME

Connect to an external resistor (47k

Ω to 470kΩ) for VID change slew-rate control.

4

VID2

Voltage Identification Input Bit 2. See Table 1. Internal 100k

5

VID3

Voltage Identification Input Bit 3. See Table 1. Internal 100k

6

VID4

Voltage Identification Input Bit 4. See Table 1. Internal 100k

7

VPOS

Voltage Positioning. Connect a resistor between VPOS and REF to set the output voltage-positioning

droop, or connect directly to REF for no output voltage positioning. Connect a 47pF capacitor from

VPOS to GND.

8

9

ILIM

connect to a voltage-divider from REF to GND to adjust the current limit. See the Setting the Current

Limit section.

10

GND

Ground

11

GNDS

Remote Ground Sense. Connect GNDS to the output ground at the load. For VRM applications, also

connect a 100

Ω resistor from GNDS to PGND locally.

12

REF

Reference Output. Connect a 0.1µF capacitor from REF to GND.

13

EN

Enable Input. Leave unconnected or drive high for normal operation. Drive low for shutdown.

14

FB

Remote Feedback Sense. Connect FB to the output at the load. For VRM applications, also connect

a 100

Ω resistor from FB to the output locally.

15

PWRGD

Power-Good Output. Open-drain output is high impedance when the output is in regulation and

pulled low when the output deviates more than 12.5% from the voltage set by the VID code. PWRGD

is also low in shutdown or during any fault condition. To use as a logic output, connect a pullup

resistor from PWRGD to the logic supply.

16

BST2

High-Side MOSFET Gate-Driver Bootstrap Input. Connect 0.22µF or higher value bypass capacitor

from BST2 to LX2. Keep trace length as short as possible. Connect a Schottky diode between BST2

and VLG. See the Selecting a BST Capacitor section.

17

DH2

High-Side MOSFET Gate-Drive Output. Connect to the high-side MOSFET gate. DH2 is pulled low in

shutdown.

18

LX2

Inductor Connection. Connect to the switched side of the inductor.

19

CS2

Negative Current-Sense Input. Connect to a current-sense resistor in series with the low-side

MOSFET, or connect to LX2 to use the low-side MOSFET’s on-resistance for current sensing.

20

DL2

Low-Side MOSFET Gate-Driver Output. Connect to the low-side MOSFET gate. DL2 is pulled low in

shutdown.

21

PGND

Power Ground. Connect to power ground at the point where the current-sense resistors or low-side

MOSFET sources connect. PGND is used as the positive current-sense connection.