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AMC1303E2520DWVR Datasheet(PDF) 9 Page - Texas Instruments |
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AMC1303E2520DWVR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 40 page  CLKOUT (AMC1303Mx) DOUT Bitream not valid DVDD ... Valid bitstream AVDD ... Bitream not valid Valid bitstream 2 cycles ... 256 cycles µ1¶ µ1¶ µ0¶ tASTART tASTART CLKOUT (AMC1303Mx) DOUT (AMC1303Mx) td th tr / tf DOUT (AMC1303Ex) 9 AMC1303E0510, AMC1303M0510, AMC1303E0520, AMC1303M0520 AMC1303E2510, AMC1303M2510, AMC1303E2520, AMC1303M2520 www.ti.com SBAS771 – JUNE 2017 Product Folder Links: AMC1303E0510 AMC1303M0510 AMC1303E0520 AMC1303M0520 AMC1303E2510 AMC1303M2510 AMC1303E2520 AMC1303M2520 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Duty cycle values are specified by design. 7.10 Switching Characteristics over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fCLK Internal clock frequency, on the CLKOUT pin of the AMC1303Mx only AMC1303Mxx10 9.6 10 10.4 MHz AMC1303Mxx20 19.2 20 20.8 Duty Cycle Internal clock duty cycle(1), on the CLKOUT pin of the AMC1303Mx only 45% 50% 55% th DOUT hold time after rising edge of CLKOUT AMC1303Mx, CLOAD = 15 pF 7 ns td DOUT delay time after rising edge of CLKOUT AMC1303Mx, CLOAD = 15 pF 15 ns tr DOUT, CLKOUT rise time 10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 0.8 3.5 ns 10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 1.8 3.9 tf DOUT, CLKOUT fall time 90% to 10%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 0.8 3.5 ns 90% to 10%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 1.8 3.9 tASTART Analog startup time AVDD step to 3.0 V with DVDD ≥ 2.7 V 0.5 ms Figure 1. AMC1303Mx Digital Interface Timing Figure 2. Digital Interface Startup Timing |
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