4

TPS54308

SLUSCV2 – JUNE 2017

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Copyright © 2017, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VIN

–0.3

30

V

EN

–0.3

7

V

FB

–0.3

7

V

BOOT-SW

–0.3

7

V

SW

–0.3

30

V

SW (20 ns transient)

–5

30

V

–40

150

°C

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic

discharge

±4000

V

±1500

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input voltage range

VIN

4.5

28

V

EN

–0.1

7

V

FB

–0.1

7

V

Output voltage range

BOOT-SW

–0.1

7

V

SW

–0.1

28

V

Operating junction temperature

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.4 Thermal Information

TPS54308

UNIT

DDC (SOT-23)

6 PINS

Junction-to-ambient thermal resistance

87.1

°C/W

Junction-to-case (top) thermal resistance

35.5

°C/W

Junction-to-board thermal resistance

14.4

°C/W

Junction-to-top characterization parameter

0.9

°C/W

Junction-to-board characterization parameter

14.2

°C/W