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ALD810018 Datasheet(PDF) 5 Page - Advanced Linear Devices |
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ALD810018 Datasheet(HTML) 5 Page - Advanced Linear Devices |
5 / 17 page ALD8100XX/ALD9100XX SUPERCAPACITOR Advanced Linear Devices, Inc. 5 of 17 AUTO BALANCING (SAB) MOSFET ARRAY FAMILY In the graph titled “Input Voltage vs. Output Current”, locate the VIN point as follows. First, find the Vt of the ALD810019 from the SAB MOSFET Selection Table, which is 1.90V. Next, subtract 1.90V from 2.42V, which is 0.52V. Check the IOUT current variation and voltage variation as a function of temperature. If the temperature variation allowance is 60mV, then the maximum supercap inbalance voltage is 2.48V (2.42V + 0.06V) across temperature. In cases where the supercapacitor leakage current is 1mA max., the ALD810019 is suggested. In cases where supercapacitor leak- age currents are up to 3mA, then a part such as the ALD81016 can be used, although this may cause increased leakage current through the SAB MOSFET itself. Another way to reduce leakage currents would be to parallel connect mulitple ALD810019 devices to auto-balance leakage currents greater than 1mA. A 4.2V SUPERCAPACITOR STACK DESIGN EXAMPLE A supply voltage of 4.2V across two supercapacitors gives 2.1V across each supercapacitor cell. With a maximum leakage current of 100µA for each cell at 2.22V maximum VIN cell voltage, the cor- responding ALD part number is ALD910020SAL, a dual 8L SOIC package. The ALD910020 would support an IOUT (supercapacitor leakage current) of 300µA at VIN = 2.30V; 100µA at VIN = 2.22V; 10µA at VIN = 2.10V and 1µA at VIN = 2.00V, respectively. An inbalance leakage current ratio between two supercapacitor cell units of 100µA to 1µA, a 100 to 1 ratio, would produce one cell voltage of 2.22V and the other cell voltage of 1.98V, which adds up to 4.20V. Simi- larly, a lower supply voltage than 4.2V would be divided between the two supercapacitors corresponding to their respective leakage currents. Consider the case when the supply voltage is 4.10V, each with an ALD910020 connected to it. If the leakage current ratio between the supercapacitors remains the same, then one cell would be biased at 2.22V (100µA) and the other would be biased at 1.88V (4.10V - 2.22V). This would cause the ALD910020 to have a max. leakage current contribution of less than 0.1µA. PARALLEL-CONNECTED AND SERIES-CONNECTED SAB MOSFETS In the first design example on the previous page, note that the ALD810026 is a quad pack, with four SAB MOSFETs in a single SOIC package. For applications where two supercapacitors are connected in series, the ALD9100xx dual SAB MOSFET is recom- mended for charge balancing. If a two-stack supercapacitor re- quires charge balancing, then there is also an option to parallel- connect two additional SAB MOSFETs of the quad ALD8100xx for each of the two supercapacitors. Parallel-connection means that the drain, gate and source terminals of each of the two SAB MOSFETs are connected together to form a single MOSFET with twice the output current and twice the output current sensitivity to voltage change. In this case, at an operating VIN voltage of 2.50V, the additional IOUT current contribution by the SAB MOSFET is equal to 2 x 0.1µA = 0.2µA. The total current for the combined supercapacitor and SAB MOSFET is = 2.5µA + 0.2µA ~= 2.7µA @ 2.50V operating voltage. At max. voltage of 2.70V across the SAB MOSFET, VIN = 2.70V results in a IOUT of 2 x 10µA = 20µA. So this configuration would be chosen to increase max. supercapacitor charge balancing leakage current at 2.70V to 20µA, at the expense of an additional 0.1µA IOUT leakage at 2.50V. For stacks of series-connected supercapacitors consisting of more than three or four cells, it is possible to use a single SAB MOSFET array for every supercapacitor stack (up to 4 cells) connected in series. Multiple SAB MOSFET arrays can be arrayed across mul- tiple supercapacitor stacks to operate at higher operating voltages. It is only important to limit the voltage across any two pins within a single SAB MOSFET array package to be less than its absolute maximum voltage and current ratings. LOW LEAKAGE ENERGY HARVESTING APPLICATIONS Supercapacitors offer an important benefit in energy harvesting ap- plications with a high impedance energy source, in buffering and storing such energy to drive a higher power load. For energy harvesting applications, supercapacitor leakage cur- rents are a critical design parameter, as the average energy har- vesting input charge must exceed the average supercapacitor in- ternal leakage currents in order for any net energy to be harvested. When the input energy is a variable, meaning that its input voltage and current magnitude is not constant and dependent upon other parameters such as the source energy availability (energy sensor conversion efficiency, etc.), the energy harvested and stored must supply and exceed the necessary leakage currents, which tend to be steady DC currents. In these types of applications, in order to minimize the amount of energy loss due to leakage currents, it is essential to choose supercapacitors with low leakage specifications and to use SAB MOSFETs to balance them. For the first 90% of the initial voltages of a supercapacitor used in energy harvesting applications, supercapacitor charge loss is lower than its maximum leakage rating, at less than its max. rated volt- age. SAB MOSFETs, used for charge balancing, would be com- pletely turned off, consuming zero leakage current while the supercapacitor is being charged, maximizing any energy harvest- ing gathering efforts. The SAB MOSFET would not become active until the supercapacitor is already charged to over 90% of its max. rated voltage. The trickle charging of supercapacitors with energy harvesting techniques tends to work well with SAB MOSFETs as charge balancing devices, as it is less likely to have high transient energy spurts resulting in excessive voltage or current excursions. If an energy harvesting source only provides a few µA of current, the power budget would not allow wasting any of this current on capacitor leakage currents, and on many other conventional charge balancing methods. Resistors or operational amplifiers used as charge-balancing circuits would dissipate far more energy than desired. It may also be an important consideration to reduce long term DC leakage currents as energy harvesting charging at low levels may take up to many days. In summary, in order for an energy harvesting application to be successful, the input energy harvested must exceed all the energy spent, due to the leakages of the supercapacitors and the charge- balancing circuits, plus any load requirements. With their unique balancing characteristics and near-zero charge loss, SAB MOSFETs are ideal devices to use for supercapacitor charge-balancing within energy harvesting applications. LONG TERM BACKUP BATTERY APPLICATIONS Similar to energy harvesting applications, any low leakage long- term application, such as a long-term backup battery requiring supercapacitors at the output to reduce output impedance and to boost its output power, would benefit from SAB MOSFET deploy- ment. Over a long time span, reducing leakge currents is an impor- tant design parameter. For example, a low DC leakage current of just 1µA over 5 years translates into 44.8mAhr of energy lost. ALD8100XX/ALD9100XX FAMILY GENERAL DESCRIPTION (cont.) |
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