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R5F102A7A Datasheet(PDF) 11 Page - Renesas Technology Corp |
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R5F102A7A Datasheet(HTML) 11 Page - Renesas Technology Corp |
11 / 110 page RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 11 of 106 1.6 Block Diagram 1.6.1 20-pin products PORT 1 P10 to P14 PORT 2 P20 to P23 4 PORT 4 P40 to P42 2 PORT 6 PORT 12 5 CRC Note PCLBUZ0 P60, P61 P121, P122, P125 RESET Low Speed On-chip oscillator 15 kHz 9 6 4 KR0 to KR5 INTP0 to INTP3 ANI2, ANI3, ANI16 to ANI22 ANI0/AVREFP ANI1/AVREFM PORT 13 P137 3 3 Multiplier & divider multiply- accumulator On-chip debug BCD adjustment IICA0 TOOL0 SCLA0 SDAA0 Power-on reset/voltage detector Clock Generator + Reset Generator High-Speed on-chip oscillator 1 to 24 MHz TOOL TxD TOOL RxD RL78 CPU core Buzzer/clock output control Key return 6ch Interrupt control 4ch Window watchdog timer 12-bit Intervaltimer 10-bit A/D converter 11ch RAM 1.5 KB Interrupt control DMA Note 2ch Code flash: 16 KB Data flash: 2 KB Note SAU0 (2ch) UART0 CSI00 CSI01 Note IIC00 Note IIC01 Note TI00/TO00 TAU0 (4ch) ch00 ch01 ch02 ch03 TI01/TO01 TI02/TO02 TI03/TO03 RxD0 TxD0 SCK00 SI00 SO00 SCK01 SI01 SO01 SCL00 SDA00 SCL01 SDA01 Main OSC 1 to 20 MHz VDD VSS X1 X2/EXCLK Note Provided only in the R5F102 products. |
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