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RMHE41A364AGBG Datasheet(PDF) 1 Page - Renesas Technology Corp |
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RMHE41A364AGBG Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 52 page R10DS0250EJ0100 Rev. 1.00 Page 1 of 51 Jun. 19, 2015 Datasheet RMHE41A184AGBG RMHE41A364AGBG 1.1G-BIT Low Latency DRAM-III Common I/O Burst Length of 4 Description The RMHE41A184AGBG is a 67,108,864-word by 18-bit and the RMHE41A364AGBG is a 33,554,432-word by 36-bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using DRAM memory cell. The Low Latency DRAM-III chip is a 1.1Gb DRAM capable of a sustained throughput of approximately 57.6 Gbps for burst length of 4 (approximately 51.2 Gbps for applications implementing error correction), excluding refresh overhead and data bus turn-around With a bus speed of 800 MHz, a burst length of 4, and a tRC of 13.75 ns, the Low Latency DRAM-III chip is capable of achieving this rate when accesses to at least 6 banks of memory are overlapped. These products are packaged in 180-pin FCBGA. Specification • Density: 1.1Gbit • Organization: 8M words x 18 bits x 8 banks 4M words x 36 bits x 8 banks • Operating frequency 800 MHz (MAX.) @ tRC=13.75 ns • tRC 13.75 ns tRC (and 13.75 ns tRFC) • Burst length: 4 • Address bus 2 cycle DDR address • Package 180-pin FCBGA (Ball Array: 1 mm x 1 mm Pitch) Package size: 18.5 mm x 14 mm ROHS 6/6 compliance • Power supply - 2.5 V VEXT - 1.5 V VDD - 1.0 V or 1.2 V VDDQ • Refresh command - Auto Refresh : 16384 cycles / 2 ms for each bank - Overlapped Refresh with REF# pin • Operating case temperature: 0 to 95 °C R10DS0250EJ0100 Rev. 1.00 Jun. 19, 2015 |
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