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RX634 Datasheet(PDF) 83 Page - Renesas Technology Corp |
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RX634 Datasheet(HTML) 83 Page - Renesas Technology Corp |
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83 / 106 page  R01DS0255EJ0100 Rev.1.00 Page 83 of 106 Feb 25, 2015 RX634 Group 5. Electrical Characteristics Note: tIICcyc: RIIC internal reference count clock (IICφ) cycle Note 1. The value in parentheses is used when the ICMR3.NF[1:0] bits are set to 11b while a digital filter is enabled with the ICFER.NFE bits = 1. Note 2. Cb indicates the total capacity of the bus line. Table 5.27 Timing of On-Chip Peripheral Modules (4) Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +85°C Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +85°C Item Symbol Min.(*1, *2) Max. Unit Test Conditions RIIC (Standard-mode) SCL input cycle time tSCL 6 (12) × tIICcyc + 1300 — ns Figure 5.35 SCL input high pulse width tSCLH 3 (6) × tIICcyc + 300 — ns SCL input low pulse width tSCLL 3 (6) × tIICcyc + 300 — ns SCL, SDA input rise time tSr — 1000 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 01 (4) × tIICcyc ns SDA input bus free time tBUF 3 (6) × tIICcyc + 300 — ns Start condition input hold time tSTAH tIICcyc + 300 — ns Restart condition input setup time tSTAS 1000 — ns Stop condition input setup time tSTOS 1000 — ns Data input setup time tSDAS tIICcyc + 50 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF RIIC (Fast-mode) SCL input cycle time tSCL 6 (12) × tIICcyc + 600 — ns SCL input high pulse width tSCLH 3 (6) × tIICcyc + 300 — ns SCL input low pulse width tSCLL 3 (6) × tIICcyc + 300 — ns SCL, SDA input rise time tSr 20 + 0.1Cb 300 ns SCL, SDA input fall time tSf 20 + 0.1Cb 300 ns SCL, SDA input spike pulse removal time tSP 01 (4) × tIICcyc ns SDA input bus free time tBUF 3 (6) × tIICcyc + 300 — ns Start condition input hold time tSTAH tIICcyc + 300 — ns Restart condition input setup time tSTAS 300 — ns Stop condition input setup time tSTOS 300 — ns Data input setup time tSDAS tIICcyc + 50 — ns Data input hold time tSDAH 0— ns SCL, SDA capacitive load Cb — 400 pF |
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