PLQP0064GA-A datasheet(3/116 Pages) RENESAS

Part #	PLQP0064GA-A

Description	32-MHz, 32-bit RX MCUs, 50 DMIPS, up to 128-KB flash memory

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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3 / 116 page

R01DS0273EJ0100 Rev.1.00

Page 3 of 116

Oct 30, 2015

RX130 Group

1. Overview

DMA

Data transfer controller

(DTCa)

 Transfer modes: Normal transfer, repeat transfer, and block transfer

 Activation sources: Interrupts

 Chain transfer function

I/O ports

General I/O ports

80-pin /64-pin /48-pin

 I/O: 68/52/38

 Input: 1/1/1

 Pull-up resistors: 68/52/38

 Open-drain outputs: 47/35/26

 5-V tolerance: 4/2/2

Event link controller (ELC)

 Event signals of 47 types can be directly connected to the module

 Operations of timer modules are selectable at event input

 Capable of event link operation for port B

Multi-function pin controller (MPC)

Capable of selecting the input/output function from multiple pins

Timers

Multi-function timer pulse

unit 2 (MTU2a)

 (16 bits × 6 channels) × 1 unit

 Up to 16 pulse-input/output lines and three pulse-input lines are available based on the six 16-bit

timer channels

 Select from among eight or seven counter-input clock signals for each channel (PCLK/1, PCLK/4,

PCLK/16, PCLK/64, PCLK/256, PCLK/1024, MTCLKA, MTCLKB, MTCLKC, MTCLKD) other than

channel 5, for which only four signals are available.

 Input capture function

 21 output compare/input capture registers

 Pulse output mode

 Complementary PWM output mode

 Reset synchronous PWM mode

 Phase-counting mode

 Capable of generating conversion start triggers for the A/D converter

Port output enable 2

(POE2a)

Controls the high-impedance state of the MTU’s waveform output pins

Compare match timer

(CMT)

 (16 bits × 2 channels) × 1 unit

 Select from among four clock signals (PCLK/8, PCLK/32, PCLK/128, PCLK/512)

Independent watchdog

timer (IWDTa)

 14 bits × 1 channel

 Count clock: Dedicated low-speed on-chip oscillator for the IWDT

Frequency divided by 1, 16, 32, 64, 128, or 256

Realtime clock (RTCc)

 Clock source: Sub-clock

 Calendar count mode or binary count mode selectable

 Interrupts: Alarm interrupt, periodic interrupt, and carry interrupt

Low power timer (LPT)

 16 bits × 1 channel

 Clock source: Sub-clock, Dedicated low-speed on-chip oscillator for the IWDT

Frequency divided by 2, 4, 8, 16, or 32

8-bit timer (TMR)

 (8 bits × 2 channels) × 2 units

 Seven internal clocks (PCLK/1, PCLK/2, PCLK/8, PCLK/32, PCLK/64, PCLK/1024, and PCLK/8192)

and an external clock can be selected

 Pulse output and PWM output with any duty cycle are available

 Two channels can be cascaded and used as a 16-bit timer

Communication

functions

Serial communications

interfaces (SCIg, SCIh)

 4 channels (channel 1, 5, 6: SCIg, channel 12: SCIh)

 SCIg

Serial communications modes: Asynchronous, clock synchronous, and smart-card interface

On-chip baud rate generator allows selection of the desired bit rate

Choice of LSB-first or MSB-first transfer

Average transfer rate clock can be input from TMR timers for SCI5, SCI6, and SCI12

Start-bit detection: Level or edge detection is selectable.

Simple I2C

Simple SPI

9-bit transfer mode

Bit rate modulation

Event linking by the ELC (only on channel 5)

 SCIh (The following functions are added to SCIg)

Supports the serial communications protocol, which contains the start frame and information frame

Supports the LIN format

I2C bus interface (RIICa)

 1 channel

 Communications formats: I2C bus format/SMBus format

 Master mode or slave mode selectable

 Supports fast mode

Table 1.1

Outline of Specifications (2/3)

Classification

Module/Function

Description

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Renesas Technology Corp	PLQP0064GA-A	1,012Kb / 110P	32 MHz 32-bit RX MCUs, 50 DMIPS, up to 128 Kbytes of flash memory
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PLQP0064GA-A Datasheet(PDF) 3 Page - Renesas Technology Corp

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