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HT48R068B Datasheet(PDF) 43 Page - Holtek Semiconductor Inc |
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HT48R068B Datasheet(HTML) 43 Page - Holtek Semiconductor Inc |
43 / 118 page Rev. 1.30 4� �e���a�� 0�� �01� Rev. 1.30 43 �e���a�� 0�� �01� HT48R068B/HT48R069B Enhanced I/O 8-Bit OTP MCU HT48R068B/HT48R069B Enhanced I/O 8-Bit OTP MCU Reset Initial Conditions Thedifferenttypesofresetdescribedaffecttheresetflagsindifferentways.Theseflags,known asPDFandTOarelocatedinthestatusregisterandarecontrolledbyvariousmicrocontroller operations,suchastheIdle/SleepfunctionorWatchdogTimer.Theresetflagsareshowninthe table: TO PDF RESET Conditions 0 0 Powe�-on �eset � � RES o� LVR �eset d��ing No�mal o� Slow Mode ope�ation 1 � WDT time-o�t �eset d��ing No�mal o� Slow Mode ope�ation 1 1 WDT time-o�t �eset d��ing Idle o� Sleep Mode ope�ation Note:"u"standsforunchanged Thefollowingtableindicatesthewayinwhichthevariouscomponentsofthemicrocontrollerare affectedafterapower-onresetoccurs. Item Condition After RESET P�og�am Co�nte� Reset to ze�o Inte���pts All inte���pts will �e disa�led WDT Clea� afte� �eset� WDT �egins co�nting Time�/Event Co�nte� Time� Co�nte� will �e t��ned off P�escale� The Time� Co�nte� P�escale� will �e clea�ed Inp�t/O�tp�t Po�ts I/O po�ts will �e set�p as inp�ts Stack Pointe� Stack Pointe� will point to the top of the stack Thedifferentkindsofresetsallaffecttheinternalregistersofthemicrocontrollerindifferentways. Toensurereliablecontinuationofnormalprogramexecutionafteraresetoccurs,itisimportantto knowwhatconditionthemicrocontrollerisinafteraparticularresetoccurs.Thefollowingtable describeshoweachtypeofresetaffectseachofthemicrocontrollerinternalregisters. Register Power-on Reset RES or LVR Reset (Normal Operation) RES or LVR Reset (Idle/Sleep) WDT Time-out (Normal Operation) WDT Time-out (Idle/Sleep) PCL ● ● 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 MP0 ● ● x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ���� ���� MP1 ● ● x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ���� ���� BP ● ––0– ––00 ––0– ––00 ––0– ––00 ––0– ––00 ––�– ––�� BP ● –00– –000 –00– –000 –00– –000 –00– –000 –��– –��� ACC ● ● x x x x x x x x ���� ���� ���� ���� ���� ���� ���� ���� TBLP ● ● x x x x x x x x ���� ���� ���� ���� ���� ���� ���� ���� TBLH ● ● x x x x x x x x ���� ���� ���� ���� ���� ���� ���� ���� WDTS ● ● –––– –111 –––– –111 –––– –111 –––– –111 –––– –��� STATUS ● ● – – 0 0 x x x x ––�� ���� ––01 ���� ––1� ���� ––11 ���� INTC0 ● ● –000 0000 –000 0000 –000 0000 –000 0000 –��� ���� INTC1 –0–0 –0–0 –0–0 –0–0 –0–0 –0–0 –0–0 –0–0 –�–� –�–� ● ● –000 –000 –000 –000 –000 –000 –000 –000 –��� –��� M�IC ● ● –000 –000 –000 –000 –000 –000 –000 –000 –��� –��� TMR0 ● ● x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ���� ���� TMR0C ● ● 0000 1000 0000 1000 0000 1000 0000 1000 ���� ���� TMR1 ● ● x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ���� ���� TMR1C ● ● 0000 1––– 0000 1––– 0000 1––– 0000 1––– ���� �––– TMR�L ● ● x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ���� ���� |
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