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ISD9300 Datasheet(PDF) 11 Page - List of Unclassifed Manufacturers

Part # ISD9300
Description  ISD Cortex-M0 ChipCorder
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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ISD9300 Datasheet(HTML) 11 Page - List of Unclassifed Manufacturers

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ISD9300 Datasheet
Release Date: Oct 23, 2014
- 11 -
Revision V1.1
Pin No.
Pin Name
Pin Type
Alt
CFG
Description
LQFP
64
SPI_SSB1
O
3
SPI Slave Select 1
40
PA.4
I/O
0
General purpose input/output pin; Port A, bit 4
I2S_FS
I/O
1
I2S Frame Sync
41
PB.13
I/O
0
General purpose input/output pin; Port B, bit 13.
SPI_MOSI1
O
1
SPI Channel 1 Master Out, Slave In
PWM5
O
2
PWM5 Output
PWM4B
O
3
PWM Channel 4 Complementary Output
42
PA.3
I/O
0
General purpose input/output pin; Port A, bit 3
SPI_MISO0
I
1
SPI Channel 0 Master In, Slave Out
I2C_SDA
I/O
2
I2C Serial Data
43
PA.2
I/O
0
General purpose input/output pin; Port A, bit 2
SPI_SSB0
I/O
1
SPI Slave Select 0
44
VDD33
P
LDO Regulator Output. If used, a 1µF capacitor must be placed
to ground. If not used then tie to VCCD.
45
PB.12
I/O
0
General purpose input/output pin; Port B, bit 13.
SPI_MISO1
O
1
Master In, Slave Out channel 1 for SPI interface
PWM4
O
2
PWM4 Output
PWM5B
O
3
PWM channel 5 Complementary Output
46
PA.1
I/O
0
General purpose input/output pin; Port A, bit 1
SPI_SCLK
I/O
1
SPI Serial Clock
I2C_SCL
I/O
2
I2C Serial Clock
47
PA.0
I/O
0
General purpose input/output pin; Port A, bit 2
SPI_MOSI0
O
1
SPI Channel 0 Master Out, Slave In
MCLK
O
2
Master clock output.
48
VCCLDO
P
Power Supply for LDO, should be connected to VCCD
49
PA.14
I/O
0
General purpose input/output pin; Port A, bit 14
TM0
I
1
External input to Timer 0
SDCLK
O
2
Inverse Clock output for digital microphone mode.
PWM4
O
3
PWM4 Output
50
PA.13
I/O
0
General purpose input/output pin; Port A, bit 13
PWM1
O
1
PWM1 Output.
SPKM
O
2
Equivalent to SPK-.


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