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MINI57TDE Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers |
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MINI57TDE Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers |
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8 / 131 page  Mini57 Apr. 06, 2017 Page 8 of 131 Rev.1.00 2 FEATURES Core - ARM® Cortex® -M0 core running up to 48 MHz - One 24-bit system timer - Supports low power Idle mode - A single-cycle 32-bit hardware multiplier - NVIC for the 32 interrupt inputs, each with 4-level of priority - Supports Serial Wire Debug (SWD) interface and two watchpoints/four breakpoints Built-in LDO for wide operating voltage ranged: 2.1V to 5.5V Memory - 29.5 Kbytes Flash memory for program memory (APROM) - Configurable Flash memory for data memory (Data Flash) - 2 KB Flash memory for loader (LDROM) - Three 0.5 KB Flash memory for security protection (SPROM) - 4 KB SRAM for internal scratch-pad RAM (SRAM) Clock Control - Programmable system clock source Switch clock sources on-the-fly - 4 ~ 24 MHz external crystal input (HXT) - 32.768 kHz external crystal input (LXT) for idle wake-up and system operation clock - 48 MHz internal oscillator (HIRC) (±1% accuracy at 25 0C, 5V) Dynamically calibrating the HIRC OSC to 48 MHz ±1% from -40℃ to 105℃ by external 32.768K crystal oscillator (LXT) - 10 kHz internal low-power oscillator (LIRC) for Watchdog Timer and idle wake- up I/O Port - Up to 22 general-purpose I/O (GPIO) pins and 1 Reset pin for QFN-33 package - Four I/O modes: Quasi-bidirectional input/output Push-Pull output Open-Drain output Input only with high impendence - Optional TTL/Schmitt trigger input - I/O pin can be configured as interrupt source with edge/level setting - Supports high driver and high sink I/O mode |
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