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ADS1203IPWT Datasheet(PDF) 3 Page - Burr-Brown (TI) |
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ADS1203IPWT Datasheet(HTML) 3 Page - Burr-Brown (TI) |
3 / 24 page ADS1203 SBAS318 − JUNE 2004 www.ti.com 3 ELECTRICAL CHARACTERISTICS Over recommended operating free-air temperature range at −40 °C to +85°C, VDD = +5V, VIN+ = −250mV to +250mV, VIN− = 0V, Mode 3, MCLK input = 20MHz, and 16-bit Sinc3 filter, with OSR = 256, unless otherwise noted. ADS1203IPW PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNITS Resolution 16 Bits DC Accuracy INL Integral linearity error(2) ±1 ±3 LSB INL Integral linearity error(2) 0.001 0.005 % DNL Differential nonlinearity(3) ±1 LSB VOS Input offset −220 ±1000 µV TCVOS Input offset drift 3.5 8 µV/°C GERR Gain error(4) −0.2 ±1 % TCGERR Gain error drift 20 ppm/ °C PSRR Power-supply rejection ratio 4.75V < VDD < 5.25V 80 dB Analog Input FSR Full-scale differential range (VIN+) − (VIN−) ±320 mV Operating common-mode signal(3) −0.1 5 V Input capacitance Common-mode 3 pF Input leakage current ±1 nA Differential input resistance Equivalent 28 k Ω Differential input capacitance 5 pF CMRR Common-mode rejection ratio At DC 92 dB CMRR Common-mode rejection ratio VIN = 0V to 5V at 50kHz 105 dB Internal Voltage Reference VOUT Reference voltage output Scale to 320mV 2.475 2.5 2.525 V Accuracy Scale to 320mV ±1 % dVOUT/dT Reference temperature drift ±20 ppm/ °C PSRR Power-supply rejection ratio 80 dB Startup time to 0.1% at CL = 0 0.1 ms Internal Clock for Modes 0, 1, and 2 Clock frequency 9 10 11 MHz External Clock for Mode 3 Clock frequency(5) 16 20 24 MHz AC Accuracy SINAD Signal-to-noise + distortion VIN = ±250mVPP at 5kHz 82.5 85 dB SNR Signal-to-noise ratio VIN = ±250mVPP at 5kHz 83 85 dB THD Total harmonic distortion VIN = ±250mVPP at 5kHz −95 −88 dB SFDR Spurious-free dynamic range VIN = ±250mVPP at 5kHz 90 95 dB (1) All typical values are at TA = +25°C. (2) Integral nonlinearity is defined as the maximum deviation of the line through the end points of the specified input range of the transfer curve for VIN+ = −250mV to +250mV, expressed either as the number of LSBs or as a percent of measured input range (500mV). (3) Ensured by design. (4) Maximum values, including temperature drift, are ensured over the full specified temperature range. (5) With reduced accuracy, minimum clock can go from 1MHz up to 32MHz. |
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