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FAN53418 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FAN53418 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 11 page FAN53418 2 REV. 1.0.0 6/11/03 Pin Configuration Pin Description Internal Block Diagram Pin Number Pin Name Pin Function Description 1 BST Bootstrap Supply Input. Provides voltage supply to high-side MOSFET driver. Connect to bootstrap capacitor (typically 100nF to 1µF). See Applications Section for detailed information. 2IN PWM Signal Input. This pin accepts a digital logic-level PWM switching signal from the controller. 3OD Output Disable. When low, this pin disables PWM switching and pulls DRVH and DRVL low. 4 VCC Power Input. +12V chip bias power. Bypass with a 1µF ceramic capacitor. 5DRVL Low Side Gate Drive Output. Connect to the gate of low-side power MOSFET(s). 6 PGND Power Ground. Power ground connect close to low-side MOSFET to minimize ground loops. 7SW Switch Node Input. Connect to switching node between HS and LS MOSFETs. It is necessary for adaptive shoot-thru protection. Also it provides return for high-side bootstrapped driver. 8DRVH High Side Gate Drive Output. Connect to the gate of high-side power MOSFET(s). IN OD VCC BST DRVH SW DRVL PGND 1 2 3 4 8 7 6 5 FAN53418 SOIC-8 3 Delay DRVH DRVL SW BST VCC IN +1V +1V 6 5 7 8 1 4 2 PGND OD 1k Ω |
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