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TLV62569, TLV62569P

SLVSDG1B – DECEMBER 2016 – REVISED JUNE 2017

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Copyright © 2016–2017, Texas Instruments Incorporated

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2000

V

±500

V

(1)

Refer to the Application and Implementation section for further information.

6.3 Recommended Operating Conditions

(1)

MIN

TYP

MAX

UNIT

Input voltage

2.5

5.5

V

Output voltage

0.6

V

Output current

0

2

A

Operating junction temperature

–40

125

°C

1

mA

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.4 Thermal Information

TLV62569

DBV (5 Pins)

TLV62569P

DDC (6 Pins)

UNIT

Junction-to-ambient thermal resistance

188.2

106.2

°C/W

p)

Junction-to-case (top) thermal resistance

137.5

52.9

°C/W

Junction-to-board thermal resistance

41.2

31.2

°C/W

Junction-to-top characterization parameter

31.4

11.3

°C/W

Junction-to-board characterization parameter

40.6

31.6

°C/W

ot)

Junction-to-case (bottom) thermal resistance

n/a

n/a

°C/W